Commit 040d2baa authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915: s/HAS_L3_GPU_CACHE/HAS_L3_DPF 



We'd only ever used this define to denote whether or not we have the
dynamic parity feature (DPF) and never to determine whether or not L3
exists. Baytrail is a good example of where L3 exists, and not DPF.

This patch provides clarify in the code for future use cases which might
want to actually query whether or not L3 exists.

v2: Add /* DPF == dynamic parity feature */

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 3ccfd19d

drivers/gpu/drm/i915/i915_drv.h

+3 −2
Original line number Diff line number Diff line
@@ -1691,8 +1691,9 @@ struct drm_i915_file_private { 


#define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)



#define HAS_L3_GPU_CACHE(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))

#define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_GPU_CACHE(dev))

/* DPF == dynamic parity feature */

#define HAS_L3_DPF(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))

#define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_DPF(dev))



#define GT_FREQUENCY_MULTIPLIER 50

drivers/gpu/drm/i915/i915_gem.c

+1 −1
Original line number Diff line number Diff line
@@ -4230,7 +4230,7 @@ int i915_gem_l3_remap(struct intel_ring_buffer *ring, int slice) 
	u32 *remap_info = dev_priv->l3_parity.remap_info[slice];

	int i, ret;



	if (!HAS_L3_GPU_CACHE(dev) || !remap_info)

	if (!HAS_L3_DPF(dev) || !remap_info)

		return 0;



	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);

drivers/gpu/drm/i915/i915_irq.c

+2 −2
Original line number Diff line number Diff line
@@ -960,7 +960,7 @@ static void ivybridge_parity_error_irq_handler(struct drm_device *dev, u32 iir) 
{

	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;



	if (!HAS_L3_GPU_CACHE(dev))

	if (!HAS_L3_DPF(dev))

		return;



	spin_lock(&dev_priv->irq_lock);
@@ -2246,7 +2246,7 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev) 
	pm_irqs = gt_irqs = 0;



	dev_priv->gt_irq_mask = ~0;

	if (HAS_L3_GPU_CACHE(dev)) {

	if (HAS_L3_DPF(dev)) {

		/* L3 parity interrupt is always unmasked. */

		dev_priv->gt_irq_mask = ~GT_PARITY_ERROR(dev);

		gt_irqs |= GT_PARITY_ERROR(dev);

drivers/gpu/drm/i915/i915_sysfs.c

+2 −2
Original line number Diff line number Diff line
@@ -97,7 +97,7 @@ static struct attribute_group rc6_attr_group = { 


static int l3_access_valid(struct drm_device *dev, loff_t offset)

{

	if (!HAS_L3_GPU_CACHE(dev))

	if (!HAS_L3_DPF(dev))

		return -EPERM;



	if (offset % 4 != 0)
@@ -525,7 +525,7 @@ void i915_setup_sysfs(struct drm_device *dev) 
			DRM_ERROR("RC6 residency sysfs setup failed\n");

	}

#endif

	if (HAS_L3_GPU_CACHE(dev)) {

	if (HAS_L3_DPF(dev)) {

		ret = device_create_bin_file(&dev->primary->kdev, &dpf_attrs);

		if (ret)

			DRM_ERROR("l3 parity sysfs setup failed\n");

drivers/gpu/drm/i915/intel_ringbuffer.c

+3 −3
Original line number Diff line number Diff line
@@ -569,7 +569,7 @@ static int init_render_ring(struct intel_ring_buffer *ring) 
	if (INTEL_INFO(dev)->gen >= 6)

		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));



	if (HAS_L3_GPU_CACHE(dev))

	if (HAS_L3_DPF(dev))

		I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev));



	return ret;
@@ -997,7 +997,7 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring) 


	spin_lock_irqsave(&dev_priv->irq_lock, flags);

	if (ring->irq_refcount++ == 0) {

		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)

		if (HAS_L3_DPF(dev) && ring->id == RCS)

			I915_WRITE_IMR(ring,

				       ~(ring->irq_enable_mask |

					 GT_PARITY_ERROR(dev)));
@@ -1019,7 +1019,7 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring) 


	spin_lock_irqsave(&dev_priv->irq_lock, flags);

	if (--ring->irq_refcount == 0) {

		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)

		if (HAS_L3_DPF(dev) && ring->id == RCS)

			I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev));

		else

			I915_WRITE_IMR(ring, ~0);

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