Commit 03b9ee45 authored Jan 01, 2016 by Roman Volkov Committed by Arnd Bergmann Jan 07, 2016

dts: vt8500: Fix errors in SDHC node for WM8505



According to datasheet, the registers space of SDHC controller is 1Kb,
not '0x1000', the correct value should be '0x400'. Bracket interrupt
numbers individually per recommendations.

Signed-off-by: Roman Volkov <rvolkov@v1ros.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

parent 9962b3d4

arch/arm/boot/dts/wm8505.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -281,8 +281,8 @@

		sdhc@d800a000 {
		compatible = "wm,wm8505-sdhc";
		reg = <0xd800a000 0x1000>;
		interrupts = <20 21>;
		reg = <0xd800a000 0x400>;
		interrupts = <20>, <21>;
		clocks = <&clksdhc>;
		bus-width = <4>;
		};

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