drm/amd/pp: Add memory clock info display on Cz/St (039fdc94) · Commits · 戴 / test

drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c

+13 −0

Original line number	Diff line number	Diff line
		@@ -1582,6 +1582,7 @@ static int cz_force_clock_level(struct pp_hwmgr *hwmgr,
		static int cz_print_clock_levels(struct pp_hwmgr *hwmgr,
		enum pp_clock_type type, char *buf)
		{
		struct cz_hwmgr data = (struct cz_hwmgr )(hwmgr->backend);
		struct phm_clock_voltage_dependency_table *sclk_table =
		hwmgr->dyn_state.vddc_dependency_on_sclk;
		int i, now, size = 0;
		@@ -1599,6 +1600,18 @@ static int cz_print_clock_levels(struct pp_hwmgr *hwmgr,
		i, sclk_table->entries[i].clk / 100,
		(i == now) ? "*" : "");
		break;
		case PP_MCLK:
		now = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device,
		CGS_IND_REG__SMC,
		ixTARGET_AND_CURRENT_PROFILE_INDEX),
		TARGET_AND_CURRENT_PROFILE_INDEX,
		CURR_MCLK_INDEX);

		for (i = CZ_NUM_NBPMEMORYCLOCK; i > 0; i--)
		size += sprintf(buf + size, "%d: %uMhz %s\n",
		CZ_NUM_NBPMEMORYCLOCK-i, data->sys_info.nbp_memory_clock[i-1] / 100,
		(CZ_NUM_NBPMEMORYCLOCK-i == now) ? "*" : "");
		break;
		default:
		break;
		}