Commit 0386af30 authored by Steve Twiss's avatar Steve Twiss Committed by Lee Jones
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mfd: da9053: Addition of extra registers for GPIOs 8-13



Definitions for GPIO registers 8, 9, 10, 11, 12 and 13 are added into
the register header file.

- DA9052_GPIO_8_9_REG    25
- DA9052_GPIO_10_11_REG  26
- DA9052_GPIO_12_13_REG  27

A modification is also made to the MFD core code to define these registers
as readable and writable. The functions for da9052_reg_readable() and
da9052_reg_writeable() have had their case statements altered to include
these new registers.

Signed-off-by: default avatarSteve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
parent 5c41f11c
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+6 −0
Original line number Diff line number Diff line
@@ -51,6 +51,9 @@ static bool da9052_reg_readable(struct device *dev, unsigned int reg)
	case DA9052_GPIO_2_3_REG:
	case DA9052_GPIO_4_5_REG:
	case DA9052_GPIO_6_7_REG:
	case DA9052_GPIO_8_9_REG:
	case DA9052_GPIO_10_11_REG:
	case DA9052_GPIO_12_13_REG:
	case DA9052_GPIO_14_15_REG:
	case DA9052_ID_0_1_REG:
	case DA9052_ID_2_3_REG:
@@ -178,6 +181,9 @@ static bool da9052_reg_writeable(struct device *dev, unsigned int reg)
	case DA9052_GPIO_2_3_REG:
	case DA9052_GPIO_4_5_REG:
	case DA9052_GPIO_6_7_REG:
	case DA9052_GPIO_8_9_REG:
	case DA9052_GPIO_10_11_REG:
	case DA9052_GPIO_12_13_REG:
	case DA9052_GPIO_14_15_REG:
	case DA9052_ID_0_1_REG:
	case DA9052_ID_2_3_REG:
+3 −0
Original line number Diff line number Diff line
@@ -65,6 +65,9 @@
#define DA9052_GPIO_2_3_REG		22
#define DA9052_GPIO_4_5_REG		23
#define DA9052_GPIO_6_7_REG		24
#define DA9052_GPIO_8_9_REG		25
#define DA9052_GPIO_10_11_REG		26
#define DA9052_GPIO_12_13_REG		27
#define DA9052_GPIO_14_15_REG		28

/* POWER SEQUENCER CONTROL REGISTERS */