Commit 036bc85c authored by Fabrizio Castro's avatar Fabrizio Castro Committed by Simon Horman
Browse files

arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes 



According to the latest information, clkp2 is available on RZ/G2.
Modify CAN0 and CAN1 nodes accordingly.

Signed-off-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: default avatarChris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 80bc6dbb

arch/arm64/boot/dts/renesas/r8a774c0.dtsi

+8 −4
Original line number Diff line number Diff line
@@ -969,8 +969,10 @@ 
				     "renesas,rcar-gen3-can";

			reg = <0 0xe6c30000 0 0x1000>;

			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 916>, <&can_clk>;

			clock-names = "clkp1", "can_clk";

			clocks = <&cpg CPG_MOD 916>,

				 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,

				 <&can_clk>;

			clock-names = "clkp1", "clkp2", "can_clk";

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 916>;

			status = "disabled";
@@ -981,8 +983,10 @@ 
				     "renesas,rcar-gen3-can";

			reg = <0 0xe6c38000 0 0x1000>;

			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 915>, <&can_clk>;

			clock-names = "clkp1", "can_clk";

			clocks = <&cpg CPG_MOD 915>,

				 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,

				 <&can_clk>;

			clock-names = "clkp1", "clkp2", "can_clk";

			power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;

			resets = <&cpg 915>;

			status = "disabled";

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