r8169: move setting OCP base to generic init code (0360c046) · Commits · 戴 / test

drivers/net/ethernet/realtek/r8169_main.c

+3 −6

Original line number	Diff line number	Diff line
		@@ -75,6 +75,8 @@
		#define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc))
		#define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc))

		#define OCP_STD_PHY_BASE 0xa400

		#define RTL_CFG_NO_GBIT 1

		/* write/read MMIO register */
		@@ -847,8 +849,6 @@ static void r8168_mac_ocp_modify(struct rtl8169_private *tp, u32 reg, u16 mask,
		r8168_mac_ocp_write(tp, reg, (data & ~mask) \| set);
		}

		#define OCP_STD_PHY_BASE 0xa400

		static void r8168g_mdio_write(struct rtl8169_private *tp, int reg, int value)
		{
		if (reg == 0x1f) {
		@@ -5189,8 +5189,6 @@ static int r8169_mdio_register(struct rtl8169_private *tp)

		static void rtl_hw_init_8168g(struct rtl8169_private *tp)
		{
		tp->ocp_base = OCP_STD_PHY_BASE;

		RTL_W32(tp, MISC, RTL_R32(tp, MISC) \| RXDV_GATED_EN);

		if (!rtl_udelay_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 42))
		@@ -5215,8 +5213,6 @@ static void rtl_hw_init_8168g(struct rtl8169_private *tp)

		static void rtl_hw_init_8125(struct rtl8169_private *tp)
		{
		tp->ocp_base = OCP_STD_PHY_BASE;

		RTL_W32(tp, MISC, RTL_R32(tp, MISC) \| RXDV_GATED_EN);

		if (!rtl_udelay_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42))
		@@ -5353,6 +5349,7 @@ static int rtl_init_one(struct pci_dev pdev, const struct pci_device_id ent)
		tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
		tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
		tp->eee_adv = -1;
		tp->ocp_base = OCP_STD_PHY_BASE;

		/* Get the optional external "ether_clk" used on some boards */
		rc = rtl_get_ether_clk(tp);

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