clocksource/drivers/timer-riscv: Use per-CPU timer interrupt (033a65de) · Commits · 戴 / test

arch/riscv/include/asm/irq.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -10,8 +10,6 @@
		#include <linux/interrupt.h>
		#include <linux/linkage.h>

		void riscv_timer_interrupt(void);

		#include <asm-generic/irq.h>

		#endif /* _ASM_RISCV_IRQ_H */

drivers/clocksource/timer-riscv.c

+40 −3

Original line number	Diff line number	Diff line
		@@ -12,8 +12,11 @@
		#include <linux/cpu.h>
		#include <linux/delay.h>
		#include <linux/irq.h>
		#include <linux/irqdomain.h>
		#include <linux/sched_clock.h>
		#include <linux/io-64-nonatomic-lo-hi.h>
		#include <linux/interrupt.h>
		#include <linux/of_irq.h>
		#include <asm/smp.h>
		#include <asm/sbi.h>

		@@ -39,6 +42,7 @@ static int riscv_clock_next_event(unsigned long delta,
		return 0;
		}

		static unsigned int riscv_clock_event_irq;
		static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = {
		.name = "riscv_timer_clockevent",
		.features = CLOCK_EVT_FEAT_ONESHOT,
		@@ -74,30 +78,36 @@ static int riscv_timer_starting_cpu(unsigned int cpu)
		struct clock_event_device *ce = per_cpu_ptr(&riscv_clock_event, cpu);

		ce->cpumask = cpumask_of(cpu);
		ce->irq = riscv_clock_event_irq;
		clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff);

		csr_set(CSR_IE, IE_TIE);
		enable_percpu_irq(riscv_clock_event_irq,
		irq_get_trigger_type(riscv_clock_event_irq));
		return 0;
		}

		static int riscv_timer_dying_cpu(unsigned int cpu)
		{
		csr_clear(CSR_IE, IE_TIE);
		disable_percpu_irq(riscv_clock_event_irq);
		return 0;
		}

		/* called directly from the low-level interrupt handler */
		void riscv_timer_interrupt(void)
		static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
		{
		struct clock_event_device *evdev = this_cpu_ptr(&riscv_clock_event);

		csr_clear(CSR_IE, IE_TIE);
		evdev->event_handler(evdev);

		return IRQ_HANDLED;
		}

		static int __init riscv_timer_init_dt(struct device_node *n)
		{
		int cpuid, hartid, error;
		struct device_node *child;
		struct irq_domain *domain;

		hartid = riscv_of_processor_hartid(n);
		if (hartid < 0) {
		@@ -115,6 +125,25 @@ static int __init riscv_timer_init_dt(struct device_node *n)
		if (cpuid != smp_processor_id())
		return 0;

		domain = NULL;
		child = of_get_compatible_child(n, "riscv,cpu-intc");
		if (!child) {
		pr_err("Failed to find INTC node [%pOF]\n", n);
		return -ENODEV;
		}
		domain = irq_find_host(child);
		of_node_put(child);
		if (!domain) {
		pr_err("Failed to find IRQ domain for node [%pOF]\n", n);
		return -ENODEV;
		}

		riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);
		if (!riscv_clock_event_irq) {
		pr_err("Failed to map timer interrupt for node [%pOF]\n", n);
		return -ENODEV;
		}

		pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
		__func__, cpuid, hartid);
		error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
		@@ -126,6 +155,14 @@ static int __init riscv_timer_init_dt(struct device_node *n)

		sched_clock_register(riscv_sched_clock, 64, riscv_timebase);

		error = request_percpu_irq(riscv_clock_event_irq,
		riscv_timer_interrupt,
		"riscv-timer", &riscv_clock_event);
		if (error) {
		pr_err("registering percpu irq failed [%d]\n", error);
		return error;
		}

		error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
		"clockevents/riscv/timer:starting",
		riscv_timer_starting_cpu, riscv_timer_dying_cpu);

drivers/irqchip/irq-riscv-intc.c

+0 −8

Original line number	Diff line number	Diff line
		@@ -21,20 +21,12 @@ static struct irq_domain *intc_domain;

		static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
		{
		struct pt_regs *old_regs;
		unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;

		if (unlikely(cause >= BITS_PER_LONG))
		panic("unexpected interrupt cause");

		switch (cause) {
		case RV_IRQ_TIMER:
		old_regs = set_irq_regs(regs);
		irq_enter();
		riscv_timer_interrupt();
		irq_exit();
		set_irq_regs(old_regs);
		break;
		#ifdef CONFIG_SMP
		case RV_IRQ_SOFT:
		/*

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