Commit 02d8ea47 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Move icl_get_trans_port_sync_config() into the DDI code 



Move the port sync readout into the DDI code where it belongs.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200313164831.5980-5-ville.syrjala@linux.intel.com


Reviewed-by: default avatarManasi Navare <manasi.d.navare@intel.com>
parent f73adaca

drivers/gpu/drm/i915/display/intel_ddi.c

+54 −0
Original line number Diff line number Diff line
@@ -3861,6 +3861,57 @@ void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv, 
		crtc_state->min_voltage_level = 2;

}



static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,

						 enum transcoder cpu_transcoder)

{

	u32 ctl2, master_select;



	ctl2 = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder));



	if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)

		return INVALID_TRANSCODER;



	master_select = ctl2 & PORT_SYNC_MODE_MASTER_SELECT_MASK;



	if (master_select == 0)

		return TRANSCODER_EDP;

	else

		return master_select - 1;

}



static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);

	u32 transcoders = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |

		BIT(TRANSCODER_C) | BIT(TRANSCODER_D);

	enum transcoder cpu_transcoder;



	crtc_state->master_transcoder =

		transcoder_master_readout(dev_priv, crtc_state->cpu_transcoder);



	for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {

		enum intel_display_power_domain power_domain;

		intel_wakeref_t trans_wakeref;



		power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);

		trans_wakeref = intel_display_power_get_if_enabled(dev_priv,

								   power_domain);



		if (!trans_wakeref)

			continue;



		if (transcoder_master_readout(dev_priv, cpu_transcoder) ==

		    crtc_state->cpu_transcoder)

			crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);



		intel_display_power_put(dev_priv, power_domain, trans_wakeref);

	}



	drm_WARN_ON(&dev_priv->drm,

		    crtc_state->master_transcoder != INVALID_TRANSCODER &&

		    crtc_state->sync_mode_slaves_mask);

}



void intel_ddi_get_config(struct intel_encoder *encoder,

			  struct intel_crtc_state *pipe_config)

{
@@ -4014,6 +4065,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder, 
	intel_read_infoframe(encoder, pipe_config,

			     HDMI_INFOFRAME_TYPE_DRM,

			     &pipe_config->infoframes.drm);



	if (INTEL_GEN(dev_priv) >= 11)

		icl_get_trans_port_sync_config(pipe_config);

}



static enum intel_output_type

drivers/gpu/drm/i915/display/intel_display.c

+0 −59
Original line number Diff line number Diff line
@@ -11049,61 +11049,6 @@ static void hsw_get_ddi_port_state(struct intel_crtc *crtc, 
	}

}













static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,













						 enum transcoder cpu_transcoder)













{













	u32 trans_port_sync, master_select;

























	trans_port_sync = intel_de_read(dev_priv,













				        TRANS_DDI_FUNC_CTL2(cpu_transcoder));

























	if ((trans_port_sync & PORT_SYNC_MODE_ENABLE) == 0)













		return INVALID_TRANSCODER;

























	master_select = trans_port_sync &













			PORT_SYNC_MODE_MASTER_SELECT_MASK;













	if (master_select == 0)













		return TRANSCODER_EDP;













	else













		return master_select - 1;













}

























static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)













{













	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);













	u32 transcoders;













	enum transcoder cpu_transcoder;

























	crtc_state->master_transcoder = transcoder_master_readout(dev_priv,













								  crtc_state->cpu_transcoder);

























	transcoders = BIT(TRANSCODER_A) |













		BIT(TRANSCODER_B) |













		BIT(TRANSCODER_C) |













		BIT(TRANSCODER_D);













	for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {













		enum intel_display_power_domain power_domain;













		intel_wakeref_t trans_wakeref;

























		power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);













		trans_wakeref = intel_display_power_get_if_enabled(dev_priv,













								   power_domain);

























		if (!trans_wakeref)













			continue;

























		if (transcoder_master_readout(dev_priv, cpu_transcoder) ==













		    crtc_state->cpu_transcoder)













			crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);

























		intel_display_power_put(dev_priv, power_domain, trans_wakeref);













	}

























	drm_WARN_ON(&dev_priv->drm,













		    crtc_state->master_transcoder != INVALID_TRANSCODER &&













		    crtc_state->sync_mode_slaves_mask);













}



























static bool hsw_get_pipe_config(struct intel_crtc *crtc,















				struct intel_crtc_state *pipe_config)















{










@@ -11235,10 +11180,6 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,













		pipe_config->pixel_multiplier = 1;















	}



























	if (INTEL_GEN(dev_priv) >= 11 &&













	    !transcoder_is_dsi(pipe_config->cpu_transcoder))













		icl_get_trans_port_sync_config(pipe_config);



























out:















	for_each_power_domain(power_domain, power_domain_mask)















		intel_display_power_put(dev_priv,



































































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