Commit 02d0bf1a authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'zynqmp-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx into arm/dt 

arm64: soc: ZynqMP DT changes for v5.10

- Fix IRQ flag for PMIC
- Align gpio hogs and leds with naming convention
- Rename busses to match DT schema
- Tune i2c cadence compatible string
- Remove undocumented u-boot properties

* tag 'zynqmp-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx:
  arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
  arm64: dts: zynqmp: Remove undocumented u-boot properties
  arm64: dts: zynqmp: Remove additional compatible string for i2c IPs
  arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml
  arm64: dts: xilinx: align GPIO hog names with dtschema
  arm64: dts: zynqmp-zcu100-revC: correct interrupt flags
  arm64: dts: xilinx: Align IOMMU nodename with dtschema
  arm64: dts: zynqmp: Add GTR transceivers

Link: https://lore.kernel.org/r/37a0333b-541e-649c-68c5-aa4b52e6b91d@monstr.eu


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents e2731253 9a19a39e

arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi

+0 −5
Original line number Diff line number Diff line
@@ -10,35 +10,30 @@ 
#include <dt-bindings/clock/xlnx-zynqmp-clk.h>

/ {

	pss_ref_clk: pss_ref_clk {

		u-boot,dm-pre-reloc;

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <33333333>;

	};



	video_clk: video_clk {

		u-boot,dm-pre-reloc;

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <27000000>;

	};



	pss_alt_ref_clk: pss_alt_ref_clk {

		u-boot,dm-pre-reloc;

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};



	gt_crx_ref_clk: gt_crx_ref_clk {

		u-boot,dm-pre-reloc;

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <108000000>;

	};



	aux_ref_clk: aux_ref_clk {

		u-boot,dm-pre-reloc;

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <27000000>;

arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts

+5 −5
Original line number Diff line number Diff line
@@ -56,27 +56,27 @@ 


	leds {

		compatible = "gpio-leds";

		ds2 {

		led-ds2 {

			label = "ds2";

			gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;

			linux,default-trigger = "heartbeat";

		};



		ds3 {

		led-ds3 {

			label = "ds3";

			gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;

			linux,default-trigger = "phy0tx"; /* WLAN tx */

			default-state = "off";

		};



		ds4 {

		led-ds4 {

			label = "ds4";

			gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;

			linux,default-trigger = "phy0rx"; /* WLAN rx */

			default-state = "off";

		};



		ds5 {

		led-ds5 {

			label = "ds5";

			gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;

			linux,default-trigger = "bluetooth-power";
@@ -186,7 +186,7 @@ 
				compatible = "ti,tps65086";

				reg = <0x5e>;

				interrupt-parent = <&gpio>;

				interrupts = <77 GPIO_ACTIVE_LOW>;

				interrupts = <77 IRQ_TYPE_LEVEL_LOW>;

				#gpio-cells = <2>;

				gpio-controller;

			};

arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts

+4 −4
Original line number Diff line number Diff line
@@ -203,25 +203,25 @@ 
		gpio-line-names = "PS_GTR_LAN_SEL0", "PS_GTR_LAN_SEL1", "PS_GTR_LAN_SEL2", "PS_GTR_LAN_SEL3",

				"PCI_CLK_DIR_SEL", "IIC_MUX_RESET_B", "GEM3_EXP_RESET_B",

				"", "", "", "", "", "", "", "", "";

		gtr-sel0 {

		gtr-sel0-hog {

			gpio-hog;

			gpios = <0 0>;

			output-low; /* PCIE = 0, DP = 1 */

			line-name = "sel0";

		};

		gtr-sel1 {

		gtr-sel1-hog {

			gpio-hog;

			gpios = <1 0>;

			output-high; /* PCIE = 0, DP = 1 */

			line-name = "sel1";

		};

		gtr-sel2 {

		gtr-sel2-hog {

			gpio-hog;

			gpios = <2 0>;

			output-high; /* PCIE = 0, USB0 = 1 */

			line-name = "sel2";

		};

		gtr-sel3 {

		gtr-sel3-hog {

			gpio-hog;

			gpios = <3 0>;

			output-high; /* PCIE = 0, SATA = 1 */

arch/arm64/boot/dts/xilinx/zynqmp.dtsi

+15 −6
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
 */



#include <dt-bindings/power/xlnx-zynqmp-power.h>

#include <dt-bindings/reset/xlnx-zynqmp-resets.h>



/ {

	compatible = "xlnx,zynqmp";
@@ -130,7 +131,6 @@ 
			};



			zynqmp_clk: clock-controller {

				u-boot,dm-pre-reloc;

				#clock-cells = <1>;

				compatible = "xlnx,zynqmp-clk";

				clocks = <&pss_ref_clk>,
@@ -182,7 +182,7 @@ 
		ranges;

	};



	amba_apu: amba-apu@0 {

	amba_apu: axi@0 {

		compatible = "simple-bus";

		#address-cells = <2>;

		#size-cells = <1>;
@@ -201,7 +201,7 @@ 
		};

	};



	amba: amba {

	amba: axi {

		compatible = "simple-bus";

		#address-cells = <2>;

		#size-cells = <2>;
@@ -500,7 +500,7 @@ 
		};



		i2c0: i2c@ff020000 {

			compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";

			compatible = "cdns,i2c-r1p14";

			status = "disabled";

			interrupt-parent = <&gic>;

			interrupts = <0 17 4>;
@@ -511,7 +511,7 @@ 
		};



		i2c1: i2c@ff030000 {

			compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";

			compatible = "cdns,i2c-r1p14";

			status = "disabled";

			interrupt-parent = <&gic>;

			interrupts = <0 18 4>;
@@ -558,6 +558,15 @@ 
			};

		};



		psgtr: phy@fd400000 {

			compatible = "xlnx,zynqmp-psgtr-v1.1";

			status = "disabled";

			reg = <0x0 0xfd400000 0x0 0x40000>,

			      <0x0 0xfd3d0000 0x0 0x1000>;

			reg-names = "serdes", "siou";

			#phy-cells = <4>;

		};



		rtc: rtc@ffa60000 {

			compatible = "xlnx,zynqmp-rtc";

			status = "disabled";
@@ -601,7 +610,7 @@ 
			power-domains = <&zynqmp_firmware PD_SD_1>;

		};



		smmu: smmu@fd800000 {

		smmu: iommu@fd800000 {

			compatible = "arm,mmu-500";

			reg = <0x0 0xfd800000 0x0 0x20000>;

			status = "disabled";

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