Commit 027811b9 authored by Guennadi Liakhovetski's avatar Guennadi Liakhovetski Committed by Paul Mundt
Browse files

dmaengine: shdma: convert to platform device resources 



The shdma dmaengine driver currently uses numerous macros to support various
platforms, selected by ifdef's. Convert it to use platform device resources and
lists of channel descriptors to specify register locations, interrupt numbers
and other system-specific configuration variants. Unavoidably, we have to
simultaneously convert all shdma users to provide those resources.

Signed-off-by: default avatarGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 47a4dc26

arch/sh/include/asm/dma-sh.h

+10 −3
Original line number Diff line number Diff line
@@ -154,10 +154,17 @@ struct sh_dmae_slave_config { 
	char				mid_rid;

};



struct sh_dmae_channel {

	unsigned int	offset;

	unsigned int	dmars;

	unsigned int	dmars_bit;

};



struct sh_dmae_pdata {

	unsigned int mode;

	struct sh_dmae_slave_config *config;

	int config_num;

	struct sh_dmae_slave_config *slave;

	int slave_num;

	struct sh_dmae_channel *channel;

	int channel_num;

};



struct device;

arch/sh/kernel/cpu/sh4a/setup-sh7722.c

+67 −3
Original line number Diff line number Diff line
@@ -75,15 +75,79 @@ static struct sh_dmae_slave_config sh7722_dmae_slaves[] = { 
	},

};



static struct sh_dmae_channel sh7722_dmae_channels[] = {

	{

		.offset = 0,

		.dmars = 0,

		.dmars_bit = 0,

	}, {

		.offset = 0x10,

		.dmars = 0,

		.dmars_bit = 8,

	}, {

		.offset = 0x20,

		.dmars = 4,

		.dmars_bit = 0,

	}, {

		.offset = 0x30,

		.dmars = 4,

		.dmars_bit = 8,

	}, {

		.offset = 0x50,

		.dmars = 8,

		.dmars_bit = 0,

	}, {

		.offset = 0x60,

		.dmars = 8,

		.dmars_bit = 8,

	}

};



static struct sh_dmae_pdata dma_platform_data = {

	.mode		= 0,

	.config		= sh7722_dmae_slaves,

	.config_num	= ARRAY_SIZE(sh7722_dmae_slaves),

	.slave		= sh7722_dmae_slaves,

	.slave_num	= ARRAY_SIZE(sh7722_dmae_slaves),

	.channel	= sh7722_dmae_channels,

	.channel_num	= ARRAY_SIZE(sh7722_dmae_channels),

};



static struct resource sh7722_dmae_resources[] = {

	[0] = {

		/* Channel registers and DMAOR */

		.start	= 0xfe008020,

		.end	= 0xfe00808f,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		/* DMARSx */

		.start	= 0xfe009000,

		.end	= 0xfe00900b,

		.flags	= IORESOURCE_MEM,

	},

	{

		/* DMA error IRQ */

		.start	= 78,

		.end	= 78,

		.flags	= IORESOURCE_IRQ,

	},

	{

		/* IRQ for channels 0-3 */

		.start	= 48,

		.end	= 51,

		.flags	= IORESOURCE_IRQ,

	},

	{

		/* IRQ for channels 4-5 */

		.start	= 76,

		.end	= 77,

		.flags	= IORESOURCE_IRQ,

	},

};



struct platform_device dma_device = {

	.name		= "sh-dma-engine",

	.id		= -1,

	.resource	= sh7722_dmae_resources,

	.num_resources	= ARRAY_SIZE(sh7722_dmae_resources),

	.dev		= {

		.platform_data	= &dma_platform_data,

	},

arch/sh/kernel/cpu/sh4a/setup-sh7724.c

+151 −8
Original line number Diff line number Diff line
@@ -28,15 +28,157 @@ 
#include <cpu/sh7724.h>



/* DMA */

static struct sh_dmae_pdata dma_platform_data = {

	.mode = SHDMA_DMAOR1,

static struct sh_dmae_channel sh7724_dmae0_channels[] = {

	{

		.offset = 0,

		.dmars = 0,

		.dmars_bit = 0,

	}, {

		.offset = 0x10,

		.dmars = 0,

		.dmars_bit = 8,

	}, {

		.offset = 0x20,

		.dmars = 4,

		.dmars_bit = 0,

	}, {

		.offset = 0x30,

		.dmars = 4,

		.dmars_bit = 8,

	}, {

		.offset = 0x50,

		.dmars = 8,

		.dmars_bit = 0,

	}, {

		.offset = 0x60,

		.dmars = 8,

		.dmars_bit = 8,

	}

};



static struct sh_dmae_channel sh7724_dmae1_channels[] = {

	{

		.offset = 0,

		.dmars = 0,

		.dmars_bit = 0,

	}, {

		.offset = 0x10,

		.dmars = 0,

		.dmars_bit = 8,

	}, {

		.offset = 0x20,

		.dmars = 4,

		.dmars_bit = 0,

	}, {

		.offset = 0x30,

		.dmars = 4,

		.dmars_bit = 8,

	}, {

		.offset = 0x50,

		.dmars = 8,

		.dmars_bit = 0,

	}, {

		.offset = 0x60,

		.dmars = 8,

		.dmars_bit = 8,

	}

};



static struct sh_dmae_pdata dma0_platform_data = {

	.channel	= sh7724_dmae0_channels,

	.channel_num	= ARRAY_SIZE(sh7724_dmae0_channels),

};



static struct sh_dmae_pdata dma1_platform_data = {

	.channel	= sh7724_dmae1_channels,

	.channel_num	= ARRAY_SIZE(sh7724_dmae1_channels),

};



/* Resource order important! */

static struct resource sh7724_dmae0_resources[] = {

	{

		/* Channel registers and DMAOR */

		.start	= 0xfe008020,

		.end	= 0xfe00808f,

		.flags	= IORESOURCE_MEM,

	},

	{

		/* DMARSx */

		.start	= 0xfe009000,

		.end	= 0xfe00900b,

		.flags	= IORESOURCE_MEM,

	},

	{

		/* DMA error IRQ */

		.start	= 78,

		.end	= 78,

		.flags	= IORESOURCE_IRQ,

	},

	{

		/* IRQ for channels 0-3 */

		.start	= 48,

		.end	= 51,

		.flags	= IORESOURCE_IRQ,

	},

	{

		/* IRQ for channels 4-5 */

		.start	= 76,

		.end	= 77,

		.flags	= IORESOURCE_IRQ,

	},

};



/* Resource order important! */

static struct resource sh7724_dmae1_resources[] = {

	{

		/* Channel registers and DMAOR */

		.start	= 0xfdc08020,

		.end	= 0xfdc0808f,

		.flags	= IORESOURCE_MEM,

	},

	{

		/* DMARSx */

		.start	= 0xfdc09000,

		.end	= 0xfdc0900b,

		.flags	= IORESOURCE_MEM,

	},

	{

		/* DMA error IRQ */

		.start	= 74,

		.end	= 74,

		.flags	= IORESOURCE_IRQ,

	},

	{

		/* IRQ for channels 0-3 */

		.start	= 40,

		.end	= 43,

		.flags	= IORESOURCE_IRQ,

	},

	{

		/* IRQ for channels 4-5 */

		.start	= 72,

		.end	= 73,

		.flags	= IORESOURCE_IRQ,

	},

};



static struct platform_device dma_device = {

static struct platform_device dma0_device = {

	.name		= "sh-dma-engine",

	.id		= -1,

	.id		= 0,

	.resource	= sh7724_dmae0_resources,

	.num_resources	= ARRAY_SIZE(sh7724_dmae0_resources),

	.dev		= {

		.platform_data	= &dma0_platform_data,

	},

};



static struct platform_device dma1_device = {

	.name		= "sh-dma-engine",

	.id		= 1,

	.resource	= sh7724_dmae1_resources,

	.num_resources	= ARRAY_SIZE(sh7724_dmae1_resources),

	.dev		= {

		.platform_data	= &dma_platform_data,

		.platform_data	= &dma1_platform_data,

	},

};
@@ -663,7 +805,8 @@ static struct platform_device *sh7724_devices[] __initdata = { 
	&tmu3_device,

	&tmu4_device,

	&tmu5_device,

	&dma_device,

	&dma0_device,

	&dma1_device,

	&rtc_device,

	&iic0_device,

	&iic1_device,

arch/sh/kernel/cpu/sh4a/setup-sh7780.c

+107 −6
Original line number Diff line number Diff line
@@ -247,15 +247,115 @@ static struct platform_device rtc_device = { 
	.resource	= rtc_resources,

};



static struct sh_dmae_pdata dma_platform_data = {

	.mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1),

/* DMA */

static struct sh_dmae_channel sh7780_dmae0_channels[] = {

	{

		.offset = 0,

		.dmars = 0,

		.dmars_bit = 0,

	}, {

		.offset = 0x10,

		.dmars = 0,

		.dmars_bit = 8,

	}, {

		.offset = 0x20,

		.dmars = 4,

		.dmars_bit = 0,

	}, {

		.offset = 0x30,

		.dmars = 4,

		.dmars_bit = 8,

	}, {

		.offset = 0x50,

		.dmars = 8,

		.dmars_bit = 0,

	}, {

		.offset = 0x60,

		.dmars = 8,

		.dmars_bit = 8,

	}

};



static struct sh_dmae_channel sh7780_dmae1_channels[] = {

	{

		.offset = 0,

	}, {

		.offset = 0x10,

	}, {

		.offset = 0x20,

	}, {

		.offset = 0x30,

	}, {

		.offset = 0x50,

	}, {

		.offset = 0x60,

	}

};



static struct sh_dmae_pdata dma0_platform_data = {

	.channel	= sh7780_dmae0_channels,

	.channel_num	= ARRAY_SIZE(sh7780_dmae0_channels),

};



static struct sh_dmae_pdata dma1_platform_data = {

	.channel	= sh7780_dmae1_channels,

	.channel_num	= ARRAY_SIZE(sh7780_dmae1_channels),

};



static struct platform_device dma_device = {

static struct resource sh7780_dmae0_resources[] = {

	[0] = {

		/* Channel registers and DMAOR */

		.start	= 0xfc808020,

		.end	= 0xfc80808f,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		/* DMARSx */

		.start	= 0xfc809000,

		.end	= 0xfc80900b,

		.flags	= IORESOURCE_MEM,

	},

	{

		/* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */

		.start	= 34,

		.end	= 34,

		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,

	},

};



static struct resource sh7780_dmae1_resources[] = {

	[0] = {

		/* Channel registers and DMAOR */

		.start	= 0xfc818020,

		.end	= 0xfc81808f,

		.flags	= IORESOURCE_MEM,

	},

	/* DMAC1 has no DMARS */

	{

		/* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */

		.start	= 46,

		.end	= 46,

		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,

	},

};



static struct platform_device dma0_device = {

	.name           = "sh-dma-engine",

	.id             = -1,

	.id             = 0,

	.resource	= sh7780_dmae0_resources,

	.num_resources	= ARRAY_SIZE(sh7780_dmae0_resources),

	.dev            = {

		.platform_data	= &dma0_platform_data,

	},

};



static struct platform_device dma1_device = {

	.name		= "sh-dma-engine",

	.id		= 1,

	.resource	= sh7780_dmae1_resources,

	.num_resources	= ARRAY_SIZE(sh7780_dmae1_resources),

	.dev		= {

		.platform_data  = &dma_platform_data,

		.platform_data	= &dma1_platform_data,

	},

};
@@ -269,7 +369,8 @@ static struct platform_device *sh7780_devices[] __initdata = { 
	&tmu4_device,

	&tmu5_device,

	&rtc_device,

	&dma_device,

	&dma0_device,

	&dma1_device,

};



static int __init sh7780_devices_setup(void)

arch/sh/kernel/cpu/sh4a/setup-sh7785.c

+107 −6
Original line number Diff line number Diff line
@@ -295,15 +295,115 @@ static struct platform_device tmu5_device = { 
	.num_resources	= ARRAY_SIZE(tmu5_resources),

};



static struct sh_dmae_pdata dma_platform_data = {

	.mode = (SHDMA_MIX_IRQ | SHDMA_DMAOR1),

/* DMA */

static struct sh_dmae_channel sh7785_dmae0_channels[] = {

	{

		.offset = 0,

		.dmars = 0,

		.dmars_bit = 0,

	}, {

		.offset = 0x10,

		.dmars = 0,

		.dmars_bit = 8,

	}, {

		.offset = 0x20,

		.dmars = 4,

		.dmars_bit = 0,

	}, {

		.offset = 0x30,

		.dmars = 4,

		.dmars_bit = 8,

	}, {

		.offset = 0x50,

		.dmars = 8,

		.dmars_bit = 0,

	}, {

		.offset = 0x60,

		.dmars = 8,

		.dmars_bit = 8,

	}

};



static struct sh_dmae_channel sh7785_dmae1_channels[] = {

	{

		.offset = 0,

	}, {

		.offset = 0x10,

	}, {

		.offset = 0x20,

	}, {

		.offset = 0x30,

	}, {

		.offset = 0x50,

	}, {

		.offset = 0x60,

	}

};



static struct sh_dmae_pdata dma0_platform_data = {

	.channel	= sh7785_dmae0_channels,

	.channel_num	= ARRAY_SIZE(sh7785_dmae0_channels),

};



static struct sh_dmae_pdata dma1_platform_data = {

	.channel	= sh7785_dmae1_channels,

	.channel_num	= ARRAY_SIZE(sh7785_dmae1_channels),

};



static struct resource sh7785_dmae0_resources[] = {

	[0] = {

		/* Channel registers and DMAOR */

		.start	= 0xfc808020,

		.end	= 0xfc80808f,

		.flags	= IORESOURCE_MEM,

	},

	[1] = {

		/* DMARSx */

		.start	= 0xfc809000,

		.end	= 0xfc80900b,

		.flags	= IORESOURCE_MEM,

	},

	{

		/* Real DMA error IRQ is 39, and channel IRQs are 33-38 */

		.start	= 33,

		.end	= 33,

		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,

	},

};



static struct platform_device dma_device = {

static struct resource sh7785_dmae1_resources[] = {

	[0] = {

		/* Channel registers and DMAOR */

		.start	= 0xfcc08020,

		.end	= 0xfcc0808f,

		.flags	= IORESOURCE_MEM,

	},

	/* DMAC1 has no DMARS */

	{

		/* Real DMA error IRQ is 58, and channel IRQs are 52-57 */

		.start	= 52,

		.end	= 52,

		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,

	},

};



static struct platform_device dma0_device = {

	.name           = "sh-dma-engine",

	.id             = 0,

	.resource	= sh7785_dmae0_resources,

	.num_resources	= ARRAY_SIZE(sh7785_dmae0_resources),

	.dev            = {

		.platform_data	= &dma0_platform_data,

	},

};



static struct platform_device dma1_device = {

	.name		= "sh-dma-engine",

	.id             = -1,

	.id		= 1,

	.resource	= sh7785_dmae1_resources,

	.num_resources	= ARRAY_SIZE(sh7785_dmae1_resources),

	.dev		= {

		.platform_data  = &dma_platform_data,

		.platform_data	= &dma1_platform_data,

	},

};
@@ -320,7 +420,8 @@ static struct platform_device *sh7785_devices[] __initdata = { 
	&tmu3_device,

	&tmu4_device,

	&tmu5_device,

	&dma_device,

	&dma0_device,

	&dma1_device,

};



static int __init sh7785_devices_setup(void)

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