Commit 0248baca authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'intel-gpio-v5.1-1' of... 

Merge tag 'intel-gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel

intel-gpio for v5.1-1

Small clean up for Intel PMIC GPIO drivers, includes:
 - optimizing IRQ handlers by usage of for_each_set_bit()
 - sorting headers alphabetically for better maintenance
 - conversion to SPDX identifier

The following is an automated git shortlog grouped by driver:

crystalcove:
 -  Convert to use SPDX identifier
 -  Sort headers alphabetically
 -  Use for_each_set_bit() in IRQ handler

msic:
 -  Convert to use SPDX identifier
 -  Sort headers alphabetically
 -  Remove duplicate check in IRQ handler

wcove:
 -  Convert to use SPDX identifier
 -  Fix indentation
 -  Sort headers alphabetically
 -  Allow return negative error code from to_reg()
parents 8fab3d71 fd30b72e

drivers/gpio/gpio-crystalcove.c

+10 −20
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * gpio-crystalcove.c - Intel Crystal Cove GPIO Driver

 * Intel Crystal Cove GPIO Driver

 *

 * Copyright (C) 2012, 2014 Intel Corporation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License version

 * 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * Author: Yang, Bin <bin.yang@intel.com>

 */



#include <linux/bitops.h>

#include <linux/gpio/driver.h>

#include <linux/interrupt.h>

#include <linux/mfd/intel_soc_pmic.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/gpio/driver.h>

#include <linux/seq_file.h>

#include <linux/bitops.h>

#include <linux/regmap.h>

#include <linux/mfd/intel_soc_pmic.h>

#include <linux/seq_file.h>



#define CRYSTALCOVE_GPIO_NUM	16

#define CRYSTALCOVE_VGPIO_NUM	95
@@ -279,8 +271,8 @@ static struct irq_chip crystalcove_irqchip = { 
static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data)

{

	struct crystalcove_gpio *cg = data;

	unsigned long pending;

	unsigned int p0, p1;

	int pending;

	int gpio;

	unsigned int virq;
@@ -293,12 +285,10 @@ static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data) 


	pending = p0 | p1 << 8;



	for (gpio = 0; gpio < CRYSTALCOVE_GPIO_NUM; gpio++) {

		if (pending & BIT(gpio)) {

	for_each_set_bit(gpio, &pending, CRYSTALCOVE_GPIO_NUM) {

		virq = irq_find_mapping(cg->chip.irq.domain, gpio);

		handle_nested_irq(virq);

	}

	}



	return IRQ_HANDLED;

}

drivers/gpio/gpio-msic.c

+9 −25
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Intel Medfield MSIC GPIO driver>

 * Copyright (c) 2011, Intel Corporation.

 *

 * Author: Mathias Nyman <mathias.nyman@linux.intel.com>

 * Based on intel_pmic_gpio.c

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program; if not, write to the Free Software Foundation, Inc.,

 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

 *

 */



#include <linux/kernel.h>

#include <linux/slab.h>

#include <linux/interrupt.h>

#include <linux/init.h>

#include <linux/gpio/driver.h>

#include <linux/platform_device.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/kernel.h>

#include <linux/mfd/intel_msic.h>

#include <linux/platform_device.h>

#include <linux/slab.h>



/* the offset for the mapping of global gpio pin to irq */

#define MSIC_GPIO_IRQ_OFFSET	0x100
@@ -237,20 +224,17 @@ static void msic_gpio_irq_handler(struct irq_desc *desc) 
	struct msic_gpio *mg = irq_data_get_irq_handler_data(data);

	struct irq_chip *chip = irq_data_get_irq_chip(data);

	struct intel_msic *msic = pdev_to_intel_msic(mg->pdev);

	unsigned long pending;

	int i;

	int bitnr;

	u8 pin;

	unsigned long pending = 0;



	for (i = 0; i < (mg->chip.ngpio / BITS_PER_BYTE); i++) {

		intel_msic_irq_read(msic, INTEL_MSIC_GPIO0LVIRQ + i, &pin);

		pending = pin;



		if (pending) {

		for_each_set_bit(bitnr, &pending, BITS_PER_BYTE)

				generic_handle_irq(mg->irq_base +

						   (i * BITS_PER_BYTE) + bitnr);

		}

			generic_handle_irq(mg->irq_base + i * BITS_PER_BYTE + bitnr);

	}

	chip->irq_eoi(data);

}

drivers/gpio/gpio-wcove.c

+10 −19
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Intel Whiskey Cove PMIC GPIO Driver

 *

 * This driver is written based on gpio-crystalcove.c

 *

 * Copyright (C) 2016 Intel Corporation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License version

 * 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <linux/bitops.h>

#include <linux/module.h>

#include <linux/interrupt.h>

#include <linux/gpio/driver.h>

#include <linux/interrupt.h>

#include <linux/mfd/intel_soc_pmic.h>

#include <linux/module.h>

#include <linux/platform_device.h>

#include <linux/regmap.h>

#include <linux/seq_file.h>
@@ -105,7 +97,7 @@ struct wcove_gpio { 
	bool set_irq_mask;

};



static inline unsigned int to_reg(int gpio, enum ctrl_register reg_type)

static inline int to_reg(int gpio, enum ctrl_register reg_type)

{

	unsigned int reg;
@@ -203,8 +195,7 @@ static int wcove_gpio_get(struct gpio_chip *chip, unsigned int gpio) 
	return val & 0x1;

}



static void wcove_gpio_set(struct gpio_chip *chip,

				 unsigned int gpio, int value)

static void wcove_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)

{

	struct wcove_gpio *wg = gpiochip_get_data(chip);

	int reg = to_reg(gpio, CTRL_OUT);

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