Commit 020929d6 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'hnx3-vf'



Salil Mehta says:

====================
Hisilicon Network Subsystem 3 VF Ethernet Driver

This patch-set contains the support of the HNS3 (Hisilicon Network Subsystem 3)
Virtual Function Ethernet driver for hip08 family of SoCs. The Physical Function
driver is already part of the Linux mainline.

This VF driver has its Hardware Compatibility Layer and has commom/unified ENET
layer/client/ethtool code with the PF driver. It also has support of mailbox to
communicate with the HNS3 PF driver. The basic architecture of VF driver is
derivative of the PF driver. Just like PF driver, this driver is also PCI
Express based.

This driver is the ongoing development work and HNS3 VF Ethernet driver would be
incrementally enhanced with more new features.

High Level Architecture:

                     [ Ethtool ]
	                 |
                 [ Ethernet Client ] ... [ RoCE Client ]
                         |                     |
                   [ HNAE Device ]             |________
                         |                     |       |
    ---------------------------------------------      |
                                                       |
     [ HNAE3 Framework (Register/unregister) ]         |
                                                       |
    ---------------------------------------------      |
                         |                             |
                 [ VF HCLGE Layer ]                    |
                  |             |                      |
                  |             |                      |
                  |             |                      |
                  |     [ VF Mailbox (To PF via IMP) ] |
                  |             |                      |
             [ IMP command Interface ]  [ IMP command Interface ]
                        |                              |
                        |                              |
           (A B O V E  R U N S  O N  G U E S T  S Y S T E M)
    -------------------------------------------------------------
              Q E M U / V F I O / K V M (on Host System)
    -------------------------------------------------------------
            HIP08  H A R D W A R E (limited to VF by SMMU)

   [ IMP/Mgmt Processor (hardware common to system/cmd based) ]

                Fig 1.   HNS3 Virtual Function Driver

    	[ dcbnl ]  [ Ethtool ]
            |          |
   	[  Ethernet Client  ]  [ ODP/UIO Client ] . . .[ RoCE Client ]
              |_____________________|                 |
                         |                   _________|
                   [ HNAE Device ]           |        |
                         |                   |        |
    ---------------------------------------------     |
                                                      |
     [ HNAE3 Framework (Register/unregister) ]        |
                                                      |
    ---------------------------------------------     |
                         |                            |
                  [ HCLGE Layer ]                     |
         ________________|_________________           |
        |                |                 |          |
     [ DCB ]             |                 |          |
        |                |                 |          |
  [ Scheduler/Shaper ] [ MDIO ]      [ PF Mailbox ]   |
        |                |                 |          |
        |________________|_________________|          |
                         |                            |
             [ IMP command Interface ]     [ IMP command Interface ]
    ----------------------------------------------------------------
              HIP08  H A R D W A R E

  [ IMP/Mgmt Processor (hardware common to system/cmd based) ]

               Fig 2.    Existing HNS3 PF Driver (added with mailbox)

Change Log Summary:
Patch V4: Addressed SPDX related comment by Philippe Ombredanne
Patch V3: Addressed SPDX change requested by Philippe Ombredanne
Patch V2: 1. Addressed some comments by David Miller.
	  2. Addressed some internal comments on various patches
Patch V1: Initial Submit
====================

Acked-by: default avatarPhilippe Ombredanne <pombredanne@nexb.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents be17bbec c1a81619
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+19 −9
Original line number Diff line number Diff line
@@ -94,15 +94,6 @@ config HNS3_HCLGE
	  compatibility layer. The engine would be used in Hisilicon hip08 family of
	  SoCs and further upcoming SoCs.

config HNS3_ENET
	tristate "Hisilicon HNS3 Ethernet Device Support"
	depends on 64BIT && PCI
	depends on HNS3 && HNS3_HCLGE
	---help---
	  This selects the Ethernet Driver for Hisilicon Network Subsystem 3 for hip08
	  family of SoCs. This module depends upon HNAE3 driver to access the HNAE3
	  devices and their associated operations.

config HNS3_DCB
	bool "Hisilicon HNS3 Data Center Bridge Support"
	default n
@@ -112,4 +103,23 @@ config HNS3_DCB

	  If unsure, say N.

config HNS3_HCLGEVF
    tristate "Hisilicon HNS3VF Acceleration Engine & Compatibility Layer Support"
    depends on PCI_MSI
    depends on HNS3
	depends on HNS3_HCLGE
    ---help---
	  This selects the HNS3 VF drivers network acceleration engine & its hardware
	  compatibility layer. The engine would be used in Hisilicon hip08 family of
	  SoCs and further upcoming SoCs.

config HNS3_ENET
	tristate "Hisilicon HNS3 Ethernet Device Support"
	depends on 64BIT && PCI
	depends on HNS3
	---help---
	  This selects the Ethernet Driver for Hisilicon Network Subsystem 3 for hip08
	  family of SoCs. This module depends upon HNAE3 driver to access the HNAE3
	  devices and their associated operations.

endif # NET_VENDOR_HISILICON
+7 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0+
#
# Makefile for the HISILICON network device drivers.
#

obj-$(CONFIG_HNS3) += hns3pf/
obj-$(CONFIG_HNS3) += hns3vf/

obj-$(CONFIG_HNS3) += hnae3.o

obj-$(CONFIG_HNS3_ENET) += hns3.o
hns3-objs = hns3_enet.o hns3_ethtool.o

hns3-$(CONFIG_HNS3_DCB) += hns3_dcbnl.o
+88 −0
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright (c) 2016-2017 Hisilicon Limited. */

#ifndef __HCLGE_MBX_H
#define __HCLGE_MBX_H
#include <linux/init.h>
#include <linux/mutex.h>
#include <linux/types.h>

#define HCLGE_MBX_VF_MSG_DATA_NUM	16

enum HCLGE_MBX_OPCODE {
	HCLGE_MBX_RESET = 0x01,		/* (VF -> PF) assert reset */
	HCLGE_MBX_SET_UNICAST,		/* (VF -> PF) set UC addr */
	HCLGE_MBX_SET_MULTICAST,	/* (VF -> PF) set MC addr */
	HCLGE_MBX_SET_VLAN,		/* (VF -> PF) set VLAN */
	HCLGE_MBX_MAP_RING_TO_VECTOR,	/* (VF -> PF) map ring-to-vector */
	HCLGE_MBX_UNMAP_RING_TO_VECTOR,	/* (VF -> PF) unamp ring-to-vector */
	HCLGE_MBX_SET_PROMISC_MODE,	/* (VF -> PF) set promiscuous mode */
	HCLGE_MBX_SET_MACVLAN,		/* (VF -> PF) set unicast filter */
	HCLGE_MBX_API_NEGOTIATE,	/* (VF -> PF) negotiate API version */
	HCLGE_MBX_GET_QINFO,		/* (VF -> PF) get queue config */
	HCLGE_MBX_GET_TCINFO,		/* (VF -> PF) get TC config */
	HCLGE_MBX_GET_RETA,		/* (VF -> PF) get RETA */
	HCLGE_MBX_GET_RSS_KEY,		/* (VF -> PF) get RSS key */
	HCLGE_MBX_GET_MAC_ADDR,		/* (VF -> PF) get MAC addr */
	HCLGE_MBX_PF_VF_RESP,		/* (PF -> VF) generate respone to VF */
	HCLGE_MBX_GET_BDNUM,		/* (VF -> PF) get BD num */
	HCLGE_MBX_GET_BUFSIZE,		/* (VF -> PF) get buffer size */
	HCLGE_MBX_GET_STREAMID,		/* (VF -> PF) get stream id */
	HCLGE_MBX_SET_AESTART,		/* (VF -> PF) start ae */
	HCLGE_MBX_SET_TSOSTATS,		/* (VF -> PF) get tso stats */
	HCLGE_MBX_LINK_STAT_CHANGE,	/* (PF -> VF) link status has changed */
	HCLGE_MBX_GET_BASE_CONFIG,	/* (VF -> PF) get config */
	HCLGE_MBX_BIND_FUNC_QUEUE,	/* (VF -> PF) bind function and queue */
	HCLGE_MBX_GET_LINK_STATUS,	/* (VF -> PF) get link status */
	HCLGE_MBX_QUEUE_RESET,		/* (VF -> PF) reset queue */
};

/* below are per-VF mac-vlan subcodes */
enum hclge_mbx_mac_vlan_subcode {
	HCLGE_MBX_MAC_VLAN_UC_MODIFY = 0,	/* modify UC mac addr */
	HCLGE_MBX_MAC_VLAN_UC_ADD,		/* add a new UC mac addr */
	HCLGE_MBX_MAC_VLAN_UC_REMOVE,		/* remove a new UC mac addr */
	HCLGE_MBX_MAC_VLAN_MC_MODIFY,		/* modify MC mac addr */
	HCLGE_MBX_MAC_VLAN_MC_ADD,		/* add new MC mac addr */
	HCLGE_MBX_MAC_VLAN_MC_REMOVE,		/* remove MC mac addr */
	HCLGE_MBX_MAC_VLAN_MC_FUNC_MTA_ENABLE,	/* config func MTA enable */
};

/* below are per-VF vlan cfg subcodes */
enum hclge_mbx_vlan_cfg_subcode {
	HCLGE_MBX_VLAN_FILTER = 0,	/* set vlan filter */
	HCLGE_MBX_VLAN_TX_OFF_CFG,	/* set tx side vlan offload */
	HCLGE_MBX_VLAN_RX_OFF_CFG,	/* set rx side vlan offload */
};

#define HCLGE_MBX_MAX_MSG_SIZE	16
#define HCLGE_MBX_MAX_RESP_DATA_SIZE	8

struct hclgevf_mbx_resp_status {
	struct mutex mbx_mutex; /* protects against contending sync cmd resp */
	u32 origin_mbx_msg;
	bool received_resp;
	int resp_status;
	u8 additional_info[HCLGE_MBX_MAX_RESP_DATA_SIZE];
};

struct hclge_mbx_vf_to_pf_cmd {
	u8 rsv;
	u8 mbx_src_vfid; /* Auto filled by IMP */
	u8 rsv1[2];
	u8 msg_len;
	u8 rsv2[3];
	u8 msg[HCLGE_MBX_MAX_MSG_SIZE];
};

struct hclge_mbx_pf_to_vf_cmd {
	u8 dest_vfid;
	u8 rsv[3];
	u8 msg_len;
	u8 rsv1[3];
	u16 msg[8];
};

#define hclge_mbx_ring_ptr_move_crq(crq) \
	(crq->next_to_use = (crq->next_to_use + 1) % crq->desc_num)
#endif
+12 −2
Original line number Diff line number Diff line
@@ -196,9 +196,18 @@ int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev)
	const struct pci_device_id *id;
	struct hnae3_ae_algo *ae_algo;
	struct hnae3_client *client;
	int ret = 0;
	int ret = 0, lock_acquired;

	/* we can get deadlocked if SRIOV is being enabled in context to probe
	 * and probe gets called again in same context. This can happen when
	 * pci_enable_sriov() is called to create VFs from PF probes context.
	 * Therefore, for simplicity uniformly defering further probing in all
	 * cases where we detect contention.
	 */
	lock_acquired = mutex_trylock(&hnae3_common_lock);
	if (!lock_acquired)
		return -EPROBE_DEFER;

	mutex_lock(&hnae3_common_lock);
	list_add_tail(&ae_dev->node, &hnae3_ae_dev_list);

	/* Check if there are matched ae_algo */
@@ -211,6 +220,7 @@ int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev)

		if (!ae_dev->ops) {
			dev_err(&ae_dev->pdev->dev, "ae_dev ops are null\n");
			ret = -EOPNOTSUPP;
			goto out_err;
		}

+4 −3
Original line number Diff line number Diff line
@@ -452,9 +452,10 @@ struct hnae3_unic_private_info {
	struct hnae3_queue **tqp;  /* array base of all TQPs of this instance */
};

#define HNAE3_SUPPORT_MAC_LOOPBACK    1
#define HNAE3_SUPPORT_PHY_LOOPBACK    2
#define HNAE3_SUPPORT_SERDES_LOOPBACK 4
#define HNAE3_SUPPORT_MAC_LOOPBACK    BIT(0)
#define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
#define HNAE3_SUPPORT_SERDES_LOOPBACK BIT(2)
#define HNAE3_SUPPORT_VF	      BIT(3)

struct hnae3_handle {
	struct hnae3_client *client;
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