Commit 01e93a17 authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Krzysztof Kozlowski
Browse files

cpufreq: s3c24xx: split out registers 



Each of the cpufreq drivers uses a fixed set of register
bits, copy those definitions into the drivers to avoid
including mach/regs-clock.h.

[krzk: Fix build by copying also S3C2410_LOCKTIME]

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20200806182059.2431-34-krzk@kernel.org


Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 81994e0f

drivers/cpufreq/s3c2410-cpufreq.c

+9 −2
Original line number Diff line number Diff line
@@ -20,11 +20,18 @@ 
#include <asm/mach/arch.h>

#include <asm/mach/map.h>



#include <mach/regs-clock.h>



#include <plat/cpu.h>

#include <plat/cpu-freq-core.h>



#include <mach/map.h>



#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR)



#define S3C2410_CLKDIVN	    S3C2410_CLKREG(0x14)



#define S3C2410_CLKDIVN_PDIVN	     (1<<0)

#define S3C2410_CLKDIVN_HDIVN	     (1<<1)



/* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */



static void s3c2410_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)

drivers/cpufreq/s3c2412-cpufreq.c

+19 −1
Original line number Diff line number Diff line
@@ -23,12 +23,30 @@ 
#include <asm/mach/arch.h>

#include <asm/mach/map.h>



#include <mach/regs-clock.h>

#include <mach/s3c2412.h>



#include <plat/cpu.h>

#include <plat/cpu-freq-core.h>



#include <mach/map.h>



#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR)



#define S3C2410_CLKDIVN	    S3C2410_CLKREG(0x14)



#define S3C2412_CLKDIVN_PDIVN		(1<<2)

#define S3C2412_CLKDIVN_HDIVN_MASK	(3<<0)

#define S3C2412_CLKDIVN_ARMDIVN		(1<<3)

#define S3C2412_CLKDIVN_DVSEN		(1<<4)

#define S3C2412_CLKDIVN_HALFHCLK	(1<<5)

#define S3C2412_CLKDIVN_USB48DIV	(1<<6)

#define S3C2412_CLKDIVN_UARTDIV_MASK	(15<<8)

#define S3C2412_CLKDIVN_UARTDIV_SHIFT	(8)

#define S3C2412_CLKDIVN_I2SDIV_MASK	(15<<12)

#define S3C2412_CLKDIVN_I2SDIV_SHIFT	(12)

#define S3C2412_CLKDIVN_CAMDIV_MASK	(15<<16)

#define S3C2412_CLKDIVN_CAMDIV_SHIFT	(16)



/* our clock resources. */

static struct clk *xtal;

static struct clk *fclk;

drivers/cpufreq/s3c2440-cpufreq.c

+22 −2
Original line number Diff line number Diff line
@@ -24,11 +24,31 @@ 
#include <asm/mach/arch.h>

#include <asm/mach/map.h>



#include <mach/regs-clock.h>



#include <plat/cpu.h>

#include <plat/cpu-freq-core.h>



#include <mach/map.h>



#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR)

#define S3C2410_CLKDIVN	    S3C2410_CLKREG(0x14)

#define S3C2440_CAMDIVN	    S3C2410_CLKREG(0x18)



#define S3C2440_CLKDIVN_PDIVN	     (1<<0)

#define S3C2440_CLKDIVN_HDIVN_MASK   (3<<1)

#define S3C2440_CLKDIVN_HDIVN_1      (0<<1)

#define S3C2440_CLKDIVN_HDIVN_2      (1<<1)

#define S3C2440_CLKDIVN_HDIVN_4_8    (2<<1)

#define S3C2440_CLKDIVN_HDIVN_3_6    (3<<1)

#define S3C2440_CLKDIVN_UCLK         (1<<3)



#define S3C2440_CAMDIVN_CAMCLK_MASK  (0xf<<0)

#define S3C2440_CAMDIVN_CAMCLK_SEL   (1<<4)

#define S3C2440_CAMDIVN_HCLK3_HALF   (1<<8)

#define S3C2440_CAMDIVN_HCLK4_HALF   (1<<9)

#define S3C2440_CAMDIVN_DVSEN        (1<<12)



#define S3C2442_CAMDIVN_CAMCLK_DIV3  (1<<5)



static struct clk *xtal;

static struct clk *fclk;

static struct clk *hclk;

drivers/cpufreq/s3c24xx-cpufreq.c

+4 −1
Original line number Diff line number Diff line
@@ -28,9 +28,12 @@ 
#include <plat/cpu.h>

#include <plat/cpu-freq-core.h>



#include <mach/regs-clock.h>

#include <mach/map.h>



/* note, cpufreq support deals in kHz, no Hz */

#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR)

#define S3C2410_LOCKTIME    S3C2410_CLKREG(0x00)

#define S3C2410_MPLLCON     S3C2410_CLKREG(0x04)



static struct cpufreq_driver s3c24xx_driver;

static struct s3c_cpufreq_config cpu_cur;

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