Commit 01df7ecd authored by Rhyland Klein's avatar Rhyland Klein Committed by Ulf Hansson
Browse files

mmc: tegra: Optimize write_w path for tegra114 and later 



Setup a different set of sdhci_ops for tegra114 and later so that
the write_w callback is only used on tegra114. This allows us to
remove the NVQUIRK_SHADOW_XFER_MODE_REG and simply the logic
in tegra_sdhci_writew.

Suggested-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: default avatarRhyland Klein <rklein@nvidia.com>
Acked-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent dbb42d96

drivers/mmc/host/sdhci-tegra.c

+26 −21
Original line number Diff line number Diff line
@@ -41,7 +41,6 @@ 
#define NVQUIRK_DISABLE_SDR50		BIT(3)

#define NVQUIRK_DISABLE_SDR104		BIT(4)

#define NVQUIRK_DISABLE_DDR50		BIT(5)

#define NVQUIRK_SHADOW_XFER_MODE_REG	BIT(6)



struct sdhci_tegra_soc_data {

	const struct sdhci_pltfm_data *pdata;
@@ -71,10 +70,7 @@ static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg) 
static void tegra_sdhci_writew(struct sdhci_host *host, u16 val, int reg)

{

	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);

	struct sdhci_tegra *tegra_host = pltfm_host->priv;

	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;



	if (soc_data->nvquirks & NVQUIRK_SHADOW_XFER_MODE_REG) {

	switch (reg) {

	case SDHCI_TRANSFER_MODE:

		/*
@@ -88,7 +84,6 @@ static void tegra_sdhci_writew(struct sdhci_host *host, u16 val, int reg) 
			host->ioaddr + SDHCI_TRANSFER_MODE);

		return;

	}

	}



	writew(val, host->ioaddr + reg);

}
@@ -173,7 +168,6 @@ static void tegra_sdhci_set_bus_width(struct sdhci_host *host, int bus_width) 
static const struct sdhci_ops tegra_sdhci_ops = {

	.get_ro     = tegra_sdhci_get_ro,

	.read_w     = tegra_sdhci_readw,

	.write_w    = tegra_sdhci_writew,

	.write_l    = tegra_sdhci_writel,

	.set_clock  = sdhci_set_clock,

	.set_bus_width = tegra_sdhci_set_bus_width,
@@ -214,6 +208,18 @@ static struct sdhci_tegra_soc_data soc_data_tegra30 = { 
		    NVQUIRK_DISABLE_SDR104,

};



static const struct sdhci_ops tegra114_sdhci_ops = {

	.get_ro     = tegra_sdhci_get_ro,

	.read_w     = tegra_sdhci_readw,

	.write_w    = tegra_sdhci_writew,

	.write_l    = tegra_sdhci_writel,

	.set_clock  = sdhci_set_clock,

	.set_bus_width = tegra_sdhci_set_bus_width,

	.reset      = tegra_sdhci_reset,

	.set_uhs_signaling = sdhci_set_uhs_signaling,

	.get_max_clock = sdhci_pltfm_clk_get_max_clock,

};



static const struct sdhci_pltfm_data sdhci_tegra114_pdata = {

	.quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |

		  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
@@ -221,15 +227,14 @@ static const struct sdhci_pltfm_data sdhci_tegra114_pdata = { 
		  SDHCI_QUIRK_NO_HISPD_BIT |

		  SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |

		  SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,

	.ops  = &tegra_sdhci_ops,

	.ops  = &tegra114_sdhci_ops,

};



static struct sdhci_tegra_soc_data soc_data_tegra114 = {

	.pdata = &sdhci_tegra114_pdata,

	.nvquirks = NVQUIRK_DISABLE_SDR50 |

		    NVQUIRK_DISABLE_DDR50 |

		    NVQUIRK_DISABLE_SDR104 |

		    NVQUIRK_SHADOW_XFER_MODE_REG,

		    NVQUIRK_DISABLE_SDR104,

};



static const struct of_device_id sdhci_tegra_dt_match[] = {

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