drm/nouveau/gr/gf100-: use new interfaces for vmm operations (019e4d76) · Commits · 戴 / test

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

+5 −8

Original line number	Diff line number	Diff line
		@@ -986,14 +986,14 @@ gf100_grctx_pack_tpc[] = {
		******************************************************************************/

		int
		gf100_grctx_mmio_data(struct gf100_grctx *info, u32 size, u32 align, u32 access)
		gf100_grctx_mmio_data(struct gf100_grctx *info, u32 size, u32 align, bool priv)
		{
		if (info->data) {
		info->buffer[info->buffer_nr] = round_up(info->addr, align);
		info->addr = info->buffer[info->buffer_nr] + size;
		info->data->size = size;
		info->data->align = align;
		info->data->access = access;
		info->data->priv = priv;
		info->data++;
		return info->buffer_nr++;
		}
		@@ -1028,9 +1028,8 @@ void
		gf100_grctx_generate_bundle(struct gf100_grctx *info)
		{
		const struct gf100_grctx_func *grctx = info->gr->func->grctx;
		const u32 access = NV_MEM_ACCESS_RW \| NV_MEM_ACCESS_SYS;
		const int s = 8;
		const int b = mmio_vram(info, grctx->bundle_size, (1 << s), access);
		const int b = mmio_vram(info, grctx->bundle_size, (1 << s), true);
		mmio_refn(info, 0x408004, 0x00000000, s, b);
		mmio_wr32(info, 0x408008, 0x80000000 \| (grctx->bundle_size >> s));
		mmio_refn(info, 0x418808, 0x00000000, s, b);
		@@ -1041,9 +1040,8 @@ void
		gf100_grctx_generate_pagepool(struct gf100_grctx *info)
		{
		const struct gf100_grctx_func *grctx = info->gr->func->grctx;
		const u32 access = NV_MEM_ACCESS_RW \| NV_MEM_ACCESS_SYS;
		const int s = 8;
		const int b = mmio_vram(info, grctx->pagepool_size, (1 << s), access);
		const int b = mmio_vram(info, grctx->pagepool_size, (1 << s), true);
		mmio_refn(info, 0x40800c, 0x00000000, s, b);
		mmio_wr32(info, 0x408010, 0x80000000);
		mmio_refn(info, 0x419004, 0x00000000, s, b);
		@@ -1057,9 +1055,8 @@ gf100_grctx_generate_attrib(struct gf100_grctx *info)
		const struct gf100_grctx_func *grctx = gr->func->grctx;
		const u32 attrib = grctx->attrib_nr;
		const u32 size = 0x20 * (grctx->attrib_nr_max + grctx->alpha_nr_max);
		const u32 access = NV_MEM_ACCESS_RW;
		const int s = 12;
		const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), access);
		const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), false);
		int gpc, tpc;
		u32 bo = 0;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -11,7 +11,7 @@ struct gf100_grctx {
		u64 addr;
		};

		int gf100_grctx_mmio_data(struct gf100_grctx *, u32 size, u32 align, u32 access);
		int gf100_grctx_mmio_data(struct gf100_grctx *, u32 size, u32 align, bool priv);
		void gf100_grctx_mmio_item(struct gf100_grctx *, u32 addr, u32 data, int s, int);

		#define mmio_vram(a,b,c,d) gf100_grctx_mmio_data((a), (b), (c), (d))

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf108.c

+1 −2

Original line number	Diff line number	Diff line
		@@ -735,9 +735,8 @@ gf108_grctx_generate_attrib(struct gf100_grctx *info)
		const u32 alpha = grctx->alpha_nr;
		const u32 beta = grctx->attrib_nr;
		const u32 size = 0x20 * (grctx->attrib_nr_max + grctx->alpha_nr_max);
		const u32 access = NV_MEM_ACCESS_RW;
		const int s = 12;
		const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), access);
		const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), false);
		const int timeslice_mode = 1;
		const int max_batches = 0xffff;
		u32 bo = 0;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c

+1 −2

Original line number	Diff line number	Diff line
		@@ -187,9 +187,8 @@ gf117_grctx_generate_attrib(struct gf100_grctx *info)
		const u32 alpha = grctx->alpha_nr;
		const u32 beta = grctx->attrib_nr;
		const u32 size = 0x20 * (grctx->attrib_nr_max + grctx->alpha_nr_max);
		const u32 access = NV_MEM_ACCESS_RW;
		const int s = 12;
		const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), access);
		const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), false);
		const int timeslice_mode = 1;
		const int max_batches = 0xffff;
		u32 bo = 0;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c

+2 −4

Original line number	Diff line number	Diff line
		@@ -847,9 +847,8 @@ gk104_grctx_generate_bundle(struct gf100_grctx *info)
		const u32 state_limit = min(grctx->bundle_min_gpm_fifo_depth,
		grctx->bundle_size / 0x20);
		const u32 token_limit = grctx->bundle_token_limit;
		const u32 access = NV_MEM_ACCESS_RW \| NV_MEM_ACCESS_SYS;
		const int s = 8;
		const int b = mmio_vram(info, grctx->bundle_size, (1 << s), access);
		const int b = mmio_vram(info, grctx->bundle_size, (1 << s), true);
		mmio_refn(info, 0x408004, 0x00000000, s, b);
		mmio_wr32(info, 0x408008, 0x80000000 \| (grctx->bundle_size >> s));
		mmio_refn(info, 0x418808, 0x00000000, s, b);
		@@ -861,9 +860,8 @@ void
		gk104_grctx_generate_pagepool(struct gf100_grctx *info)
		{
		const struct gf100_grctx_func *grctx = info->gr->func->grctx;
		const u32 access = NV_MEM_ACCESS_RW \| NV_MEM_ACCESS_SYS;
		const int s = 8;
		const int b = mmio_vram(info, grctx->pagepool_size, (1 << s), access);
		const int b = mmio_vram(info, grctx->pagepool_size, (1 << s), true);
		mmio_refn(info, 0x40800c, 0x00000000, s, b);
		mmio_wr32(info, 0x408010, 0x80000000);
		mmio_refn(info, 0x419004, 0x00000000, s, b);

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