Commit 01555e64 authored by David S. Miller's avatar David S. Miller
Browse files

Merge tag 'shared-for-4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/leon/linux-rdma 



Saeed Mahameed says:

====================
Mellanox mlx5 core driver updates 2016-08-20

This series contains several low level and API updates for mlx5 core
commands interface and mlx5_ifc.h to be shared as base code for net-next and
rdma mlx5 4.9 submissions.

From Saeed, ten patches that refactors old layouts of firmware commands which
were manually generated before we introduced the mlx5_ifc, now all of the firmware
commands inbox/outbox layouts moved to use mlx5_ifc and we remove the old
manually generated structures.  Plus to those ten patches, we add two patches
that unifies mlx5 commands execution interface and improve the driver log messages
in that area.

From Hadar and Ilya, added the needed hardware bits and infrastructure for
minimum inline headers setting and encap/decap commands and capabilities,
needed for E-Switch offloads.

This series applies on top latest net-next and rdma/master, and smoothly merges with
the latest "Mellanox 100G mlx5 fixes 2016-08-16" series already applied into net branch.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 2d03d439 575ddf58

drivers/infiniband/hw/mlx5/cq.c

+63 −47
Original line number Diff line number Diff line
@@ -747,14 +747,16 @@ static int alloc_cq_buf(struct mlx5_ib_dev *dev, struct mlx5_ib_cq_buf *buf, 


static int create_cq_user(struct mlx5_ib_dev *dev, struct ib_udata *udata,

			  struct ib_ucontext *context, struct mlx5_ib_cq *cq,

			  int entries, struct mlx5_create_cq_mbox_in **cqb,

			  int entries, u32 **cqb,

			  int *cqe_size, int *index, int *inlen)

{

	struct mlx5_ib_create_cq ucmd;

	size_t ucmdlen;

	int page_shift;

	__be64 *pas;

	int npages;

	int ncont;

	void *cqc;

	int err;



	ucmdlen =
@@ -792,14 +794,20 @@ static int create_cq_user(struct mlx5_ib_dev *dev, struct ib_udata *udata, 
	mlx5_ib_dbg(dev, "addr 0x%llx, size %u, npages %d, page_shift %d, ncont %d\n",

		    ucmd.buf_addr, entries * ucmd.cqe_size, npages, page_shift, ncont);



	*inlen = sizeof(**cqb) + sizeof(*(*cqb)->pas) * ncont;

	*inlen = MLX5_ST_SZ_BYTES(create_cq_in) +

		 MLX5_FLD_SZ_BYTES(create_cq_in, pas[0]) * ncont;

	*cqb = mlx5_vzalloc(*inlen);

	if (!*cqb) {

		err = -ENOMEM;

		goto err_db;

	}

	mlx5_ib_populate_pas(dev, cq->buf.umem, page_shift, (*cqb)->pas, 0);

	(*cqb)->ctx.log_pg_sz = page_shift - MLX5_ADAPTER_PAGE_SHIFT;



	pas = (__be64 *)MLX5_ADDR_OF(create_cq_in, *cqb, pas);

	mlx5_ib_populate_pas(dev, cq->buf.umem, page_shift, pas, 0);



	cqc = MLX5_ADDR_OF(create_cq_in, *cqb, cq_context);

	MLX5_SET(cqc, cqc, log_page_size,

		 page_shift - MLX5_ADAPTER_PAGE_SHIFT);



	*index = to_mucontext(context)->uuari.uars[0].index;
@@ -834,9 +842,10 @@ static void init_cq_buf(struct mlx5_ib_cq *cq, struct mlx5_ib_cq_buf *buf) 


static int create_cq_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_cq *cq,

			    int entries, int cqe_size,

			    struct mlx5_create_cq_mbox_in **cqb,

			    int *index, int *inlen)

			    u32 **cqb, int *index, int *inlen)

{

	__be64 *pas;

	void *cqc;

	int err;



	err = mlx5_db_alloc(dev->mdev, &cq->db);
@@ -853,15 +862,21 @@ static int create_cq_kernel(struct mlx5_ib_dev *dev, struct mlx5_ib_cq *cq, 


	init_cq_buf(cq, &cq->buf);



	*inlen = sizeof(**cqb) + sizeof(*(*cqb)->pas) * cq->buf.buf.npages;

	*inlen = MLX5_ST_SZ_BYTES(create_cq_in) +

		 MLX5_FLD_SZ_BYTES(create_cq_in, pas[0]) * cq->buf.buf.npages;

	*cqb = mlx5_vzalloc(*inlen);

	if (!*cqb) {

		err = -ENOMEM;

		goto err_buf;

	}

	mlx5_fill_page_array(&cq->buf.buf, (*cqb)->pas);



	(*cqb)->ctx.log_pg_sz = cq->buf.buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT;

	pas = (__be64 *)MLX5_ADDR_OF(create_cq_in, *cqb, pas);

	mlx5_fill_page_array(&cq->buf.buf, pas);



	cqc = MLX5_ADDR_OF(create_cq_in, *cqb, cq_context);

	MLX5_SET(cqc, cqc, log_page_size,

		 cq->buf.buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT);



	*index = dev->mdev->priv.uuari.uars[0].index;



	return 0;
@@ -895,11 +910,12 @@ struct ib_cq *mlx5_ib_create_cq(struct ib_device *ibdev, 
{

	int entries = attr->cqe;

	int vector = attr->comp_vector;

	struct mlx5_create_cq_mbox_in *cqb = NULL;

	struct mlx5_ib_dev *dev = to_mdev(ibdev);

	struct mlx5_ib_cq *cq;

	int uninitialized_var(index);

	int uninitialized_var(inlen);

	u32 *cqb = NULL;

	void *cqc;

	int cqe_size;

	unsigned int irqn;

	int eqn;
@@ -945,19 +961,20 @@ struct ib_cq *mlx5_ib_create_cq(struct ib_device *ibdev, 
		INIT_WORK(&cq->notify_work, notify_soft_wc_handler);

	}



	cq->cqe_size = cqe_size;

	cqb->ctx.cqe_sz_flags = cqe_sz_to_mlx_sz(cqe_size) << 5;



	if (cq->create_flags & IB_CQ_FLAGS_IGNORE_OVERRUN)

		cqb->ctx.cqe_sz_flags |= (1 << 1);



	cqb->ctx.log_sz_usr_page = cpu_to_be32((ilog2(entries) << 24) | index);

	err = mlx5_vector2eqn(dev->mdev, vector, &eqn, &irqn);

	if (err)

		goto err_cqb;



	cqb->ctx.c_eqn = cpu_to_be16(eqn);

	cqb->ctx.db_record_addr = cpu_to_be64(cq->db.dma);

	cq->cqe_size = cqe_size;



	cqc = MLX5_ADDR_OF(create_cq_in, cqb, cq_context);

	MLX5_SET(cqc, cqc, cqe_sz, cqe_sz_to_mlx_sz(cqe_size));

	MLX5_SET(cqc, cqc, log_cq_size, ilog2(entries));

	MLX5_SET(cqc, cqc, uar_page, index);

	MLX5_SET(cqc, cqc, c_eqn, eqn);

	MLX5_SET64(cqc, cqc, dbr_addr, cq->db.dma);

	if (cq->create_flags & IB_CQ_FLAGS_IGNORE_OVERRUN)

		MLX5_SET(cqc, cqc, oi, 1);



	err = mlx5_core_create_cq(dev->mdev, &cq->mcq, cqb, inlen);

	if (err)
@@ -1088,27 +1105,15 @@ void mlx5_ib_cq_clean(struct mlx5_ib_cq *cq, u32 qpn, struct mlx5_ib_srq *srq) 


int mlx5_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period)

{

	struct mlx5_modify_cq_mbox_in *in;

	struct mlx5_ib_dev *dev = to_mdev(cq->device);

	struct mlx5_ib_cq *mcq = to_mcq(cq);

	int err;

	u32 fsel;



	if (!MLX5_CAP_GEN(dev->mdev, cq_moderation))

		return -ENOSYS;



	in = kzalloc(sizeof(*in), GFP_KERNEL);

	if (!in)

		return -ENOMEM;



	in->cqn = cpu_to_be32(mcq->mcq.cqn);

	fsel = (MLX5_CQ_MODIFY_PERIOD | MLX5_CQ_MODIFY_COUNT);

	in->ctx.cq_period = cpu_to_be16(cq_period);

	in->ctx.cq_max_count = cpu_to_be16(cq_count);

	in->field_select = cpu_to_be32(fsel);

	err = mlx5_core_modify_cq(dev->mdev, &mcq->mcq, in, sizeof(*in));

	kfree(in);



	err = mlx5_core_modify_cq_moderation(dev->mdev, &mcq->mcq,

					     cq_period, cq_count);

	if (err)

		mlx5_ib_warn(dev, "modify cq 0x%x failed\n", mcq->mcq.cqn);
@@ -1241,9 +1246,11 @@ int mlx5_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata) 
{

	struct mlx5_ib_dev *dev = to_mdev(ibcq->device);

	struct mlx5_ib_cq *cq = to_mcq(ibcq);

	struct mlx5_modify_cq_mbox_in *in;

	void *cqc;

	u32 *in;

	int err;

	int npas;

	__be64 *pas;

	int page_shift;

	int inlen;

	int uninitialized_var(cqe_size);
@@ -1285,28 +1292,37 @@ int mlx5_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata) 
	if (err)

		goto ex;



	inlen = sizeof(*in) + npas * sizeof(in->pas[0]);

	inlen = MLX5_ST_SZ_BYTES(modify_cq_in) +

		MLX5_FLD_SZ_BYTES(modify_cq_in, pas[0]) * npas;



	in = mlx5_vzalloc(inlen);

	if (!in) {

		err = -ENOMEM;

		goto ex_resize;

	}



	pas = (__be64 *)MLX5_ADDR_OF(modify_cq_in, in, pas);

	if (udata)

		mlx5_ib_populate_pas(dev, cq->resize_umem, page_shift,

				     in->pas, 0);

				     pas, 0);

	else

		mlx5_fill_page_array(&cq->resize_buf->buf, in->pas);

		mlx5_fill_page_array(&cq->resize_buf->buf, pas);



	in->field_select = cpu_to_be32(MLX5_MODIFY_CQ_MASK_LOG_SIZE  |

	MLX5_SET(modify_cq_in, in,

		 modify_field_select_resize_field_select.resize_field_select.resize_field_select,

		 MLX5_MODIFY_CQ_MASK_LOG_SIZE  |

		 MLX5_MODIFY_CQ_MASK_PG_OFFSET |

		 MLX5_MODIFY_CQ_MASK_PG_SIZE);

	in->ctx.log_pg_sz = page_shift - MLX5_ADAPTER_PAGE_SHIFT;

	in->ctx.cqe_sz_flags = cqe_sz_to_mlx_sz(cqe_size) << 5;

	in->ctx.page_offset = 0;

	in->ctx.log_sz_usr_page = cpu_to_be32(ilog2(entries) << 24);

	in->hdr.opmod = cpu_to_be16(MLX5_CQ_OPMOD_RESIZE);

	in->cqn = cpu_to_be32(cq->mcq.cqn);



	cqc = MLX5_ADDR_OF(modify_cq_in, in, cq_context);



	MLX5_SET(cqc, cqc, log_page_size,

		 page_shift - MLX5_ADAPTER_PAGE_SHIFT);

	MLX5_SET(cqc, cqc, cqe_sz, cqe_sz_to_mlx_sz(cqe_size));

	MLX5_SET(cqc, cqc, log_cq_size, ilog2(entries));



	MLX5_SET(modify_cq_in, in, op_mod, MLX5_CQ_OPMOD_RESIZE);

	MLX5_SET(modify_cq_in, in, cqn, cq->mcq.cqn);



	err = mlx5_core_modify_cq(dev->mdev, &cq->mcq, in, inlen);

	if (err)

drivers/infiniband/hw/mlx5/main.c

+3 −7
Original line number Diff line number Diff line
@@ -234,22 +234,18 @@ static int set_roce_addr(struct ib_device *device, u8 port_num, 
			 const struct ib_gid_attr *attr)

{

	struct mlx5_ib_dev *dev = to_mdev(device);

	u32  in[MLX5_ST_SZ_DW(set_roce_address_in)];

	u32 out[MLX5_ST_SZ_DW(set_roce_address_out)];

	u32  in[MLX5_ST_SZ_DW(set_roce_address_in)]  = {0};

	u32 out[MLX5_ST_SZ_DW(set_roce_address_out)] = {0};

	void *in_addr = MLX5_ADDR_OF(set_roce_address_in, in, roce_address);

	enum rdma_link_layer ll = mlx5_ib_port_link_layer(device, port_num);



	if (ll != IB_LINK_LAYER_ETHERNET)

		return -EINVAL;



	memset(in, 0, sizeof(in));



	ib_gid_to_mlx5_roce_addr(gid, attr, in_addr);



	MLX5_SET(set_roce_address_in, in, roce_address_index, index);

	MLX5_SET(set_roce_address_in, in, opcode, MLX5_CMD_OP_SET_ROCE_ADDRESS);



	memset(out, 0, sizeof(out));

	return mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));

}

drivers/infiniband/hw/mlx5/mlx5_ib.h

+1 −1
Original line number Diff line number Diff line
@@ -504,7 +504,7 @@ struct mlx5_ib_mr { 
	int			umred;

	int			npages;

	struct mlx5_ib_dev     *dev;

	struct mlx5_create_mkey_mbox_out out;

	u32 out[MLX5_ST_SZ_DW(create_mkey_out)];

	struct mlx5_core_sig_ctx    *sig;

	int			live;

	void			*descs_alloc;

drivers/infiniband/hw/mlx5/mr.c

+103 −81
Original line number Diff line number Diff line
@@ -135,20 +135,10 @@ static void reg_mr_callback(int status, void *context) 
		return;

	}



	if (mr->out.hdr.status) {

		mlx5_ib_warn(dev, "failed - status %d, syndorme 0x%x\n",

			     mr->out.hdr.status,

			     be32_to_cpu(mr->out.hdr.syndrome));

		kfree(mr);

		dev->fill_delay = 1;

		mod_timer(&dev->delay_timer, jiffies + HZ);

		return;

	}



	spin_lock_irqsave(&dev->mdev->priv.mkey_lock, flags);

	key = dev->mdev->priv.mkey_key++;

	spin_unlock_irqrestore(&dev->mdev->priv.mkey_lock, flags);

	mr->mmkey.key = mlx5_idx_to_mkey(be32_to_cpu(mr->out.mkey) & 0xffffff) | key;

	mr->mmkey.key = mlx5_idx_to_mkey(MLX5_GET(create_mkey_out, mr->out, mkey_index)) | key;



	cache->last_add = jiffies;
@@ -170,16 +160,19 @@ static int add_keys(struct mlx5_ib_dev *dev, int c, int num) 
{

	struct mlx5_mr_cache *cache = &dev->cache;

	struct mlx5_cache_ent *ent = &cache->ent[c];

	struct mlx5_create_mkey_mbox_in *in;

	int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);

	struct mlx5_ib_mr *mr;

	int npages = 1 << ent->order;

	void *mkc;

	u32 *in;

	int err = 0;

	int i;



	in = kzalloc(sizeof(*in), GFP_KERNEL);

	in = kzalloc(inlen, GFP_KERNEL);

	if (!in)

		return -ENOMEM;



	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);

	for (i = 0; i < num; i++) {

		if (ent->pending >= MAX_PENDING_REG_MR) {

			err = -EAGAIN;
@@ -194,18 +187,22 @@ static int add_keys(struct mlx5_ib_dev *dev, int c, int num) 
		mr->order = ent->order;

		mr->umred = 1;

		mr->dev = dev;

		in->seg.status = MLX5_MKEY_STATUS_FREE;

		in->seg.xlt_oct_size = cpu_to_be32((npages + 1) / 2);

		in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);

		in->seg.flags = MLX5_ACCESS_MODE_MTT | MLX5_PERM_UMR_EN;

		in->seg.log2_page_size = 12;



		MLX5_SET(mkc, mkc, free, 1);

		MLX5_SET(mkc, mkc, umr_en, 1);

		MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_MTT);



		MLX5_SET(mkc, mkc, qpn, 0xffffff);

		MLX5_SET(mkc, mkc, translations_octword_size, (npages + 1) / 2);

		MLX5_SET(mkc, mkc, log_page_size, 12);



		spin_lock_irq(&ent->lock);

		ent->pending++;

		spin_unlock_irq(&ent->lock);

		err = mlx5_core_create_mkey(dev->mdev, &mr->mmkey, in,

					    sizeof(*in), reg_mr_callback,

					    mr, &mr->out);

		err = mlx5_core_create_mkey_cb(dev->mdev, &mr->mmkey,

					       in, inlen,

					       mr->out, sizeof(mr->out),

					       reg_mr_callback, mr);

		if (err) {

			spin_lock_irq(&ent->lock);

			ent->pending--;
@@ -670,30 +667,38 @@ int mlx5_mr_cache_cleanup(struct mlx5_ib_dev *dev) 
struct ib_mr *mlx5_ib_get_dma_mr(struct ib_pd *pd, int acc)

{

	struct mlx5_ib_dev *dev = to_mdev(pd->device);

	int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);

	struct mlx5_core_dev *mdev = dev->mdev;

	struct mlx5_create_mkey_mbox_in *in;

	struct mlx5_mkey_seg *seg;

	struct mlx5_ib_mr *mr;

	void *mkc;

	u32 *in;

	int err;



	mr = kzalloc(sizeof(*mr), GFP_KERNEL);

	if (!mr)

		return ERR_PTR(-ENOMEM);



	in = kzalloc(sizeof(*in), GFP_KERNEL);

	in = kzalloc(inlen, GFP_KERNEL);

	if (!in) {

		err = -ENOMEM;

		goto err_free;

	}



	seg = &in->seg;

	seg->flags = convert_access(acc) | MLX5_ACCESS_MODE_PA;

	seg->flags_pd = cpu_to_be32(to_mpd(pd)->pdn | MLX5_MKEY_LEN64);

	seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);

	seg->start_addr = 0;

	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);



	err = mlx5_core_create_mkey(mdev, &mr->mmkey, in, sizeof(*in), NULL, NULL,

				    NULL);

	MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_PA);

	MLX5_SET(mkc, mkc, a, !!(acc & IB_ACCESS_REMOTE_ATOMIC));

	MLX5_SET(mkc, mkc, rw, !!(acc & IB_ACCESS_REMOTE_WRITE));

	MLX5_SET(mkc, mkc, rr, !!(acc & IB_ACCESS_REMOTE_READ));

	MLX5_SET(mkc, mkc, lw, !!(acc & IB_ACCESS_LOCAL_WRITE));

	MLX5_SET(mkc, mkc, lr, 1);



	MLX5_SET(mkc, mkc, length64, 1);

	MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);

	MLX5_SET(mkc, mkc, qpn, 0xffffff);

	MLX5_SET64(mkc, mkc, start_addr, 0);



	err = mlx5_core_create_mkey(mdev, &mr->mmkey, in, inlen);

	if (err)

		goto err_in;
@@ -1063,9 +1068,11 @@ static struct mlx5_ib_mr *reg_create(struct ib_mr *ibmr, struct ib_pd *pd, 
				     int page_shift, int access_flags)

{

	struct mlx5_ib_dev *dev = to_mdev(pd->device);

	struct mlx5_create_mkey_mbox_in *in;

	struct mlx5_ib_mr *mr;

	__be64 *pas;

	void *mkc;

	int inlen;

	u32 *in;

	int err;

	bool pg_cap = !!(MLX5_CAP_GEN(dev->mdev, pg));
@@ -1073,31 +1080,41 @@ static struct mlx5_ib_mr *reg_create(struct ib_mr *ibmr, struct ib_pd *pd, 
	if (!mr)

		return ERR_PTR(-ENOMEM);



	inlen = sizeof(*in) + sizeof(*in->pas) * ((npages + 1) / 2) * 2;

	inlen = MLX5_ST_SZ_BYTES(create_mkey_in) +

		sizeof(*pas) * ((npages + 1) / 2) * 2;

	in = mlx5_vzalloc(inlen);

	if (!in) {

		err = -ENOMEM;

		goto err_1;

	}

	mlx5_ib_populate_pas(dev, umem, page_shift, in->pas,

	pas = (__be64 *)MLX5_ADDR_OF(create_mkey_in, in, klm_pas_mtt);

	mlx5_ib_populate_pas(dev, umem, page_shift, pas,

			     pg_cap ? MLX5_IB_MTT_PRESENT : 0);



	/* The MLX5_MKEY_INBOX_PG_ACCESS bit allows setting the access flags

	/* The pg_access bit allows setting the access flags

	 * in the page list submitted with the command. */

	in->flags = pg_cap ? cpu_to_be32(MLX5_MKEY_INBOX_PG_ACCESS) : 0;

	in->seg.flags = convert_access(access_flags) |

		MLX5_ACCESS_MODE_MTT;

	in->seg.flags_pd = cpu_to_be32(to_mpd(pd)->pdn);

	in->seg.start_addr = cpu_to_be64(virt_addr);

	in->seg.len = cpu_to_be64(length);

	in->seg.bsfs_octo_size = 0;

	in->seg.xlt_oct_size = cpu_to_be32(get_octo_len(virt_addr, length, 1 << page_shift));

	in->seg.log2_page_size = page_shift;

	in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);

	in->xlat_oct_act_size = cpu_to_be32(get_octo_len(virt_addr, length,

							 1 << page_shift));

	err = mlx5_core_create_mkey(dev->mdev, &mr->mmkey, in, inlen, NULL,

				    NULL, NULL);

	MLX5_SET(create_mkey_in, in, pg_access, !!(pg_cap));



	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);

	MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_MTT);

	MLX5_SET(mkc, mkc, a, !!(access_flags & IB_ACCESS_REMOTE_ATOMIC));

	MLX5_SET(mkc, mkc, rw, !!(access_flags & IB_ACCESS_REMOTE_WRITE));

	MLX5_SET(mkc, mkc, rr, !!(access_flags & IB_ACCESS_REMOTE_READ));

	MLX5_SET(mkc, mkc, lw, !!(access_flags & IB_ACCESS_LOCAL_WRITE));

	MLX5_SET(mkc, mkc, lr, 1);



	MLX5_SET64(mkc, mkc, start_addr, virt_addr);

	MLX5_SET64(mkc, mkc, len, length);

	MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);

	MLX5_SET(mkc, mkc, bsf_octword_size, 0);

	MLX5_SET(mkc, mkc, translations_octword_size,

		 get_octo_len(virt_addr, length, 1 << page_shift));

	MLX5_SET(mkc, mkc, log_page_size, page_shift);

	MLX5_SET(mkc, mkc, qpn, 0xffffff);

	MLX5_SET(create_mkey_in, in, translations_octword_actual_size,

		 get_octo_len(virt_addr, length, 1 << page_shift));



	err = mlx5_core_create_mkey(dev->mdev, &mr->mmkey, in, inlen);

	if (err) {

		mlx5_ib_warn(dev, "create mkey failed\n");

		goto err_2;
@@ -1523,30 +1540,32 @@ struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd, 
			       u32 max_num_sg)

{

	struct mlx5_ib_dev *dev = to_mdev(pd->device);

	struct mlx5_create_mkey_mbox_in *in;

	struct mlx5_ib_mr *mr;

	int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);

	int ndescs = ALIGN(max_num_sg, 4);

	struct mlx5_ib_mr *mr;

	void *mkc;

	u32 *in;

	int err;



	mr = kzalloc(sizeof(*mr), GFP_KERNEL);

	if (!mr)

		return ERR_PTR(-ENOMEM);



	in = kzalloc(sizeof(*in), GFP_KERNEL);

	in = kzalloc(inlen, GFP_KERNEL);

	if (!in) {

		err = -ENOMEM;

		goto err_free;

	}



	in->seg.status = MLX5_MKEY_STATUS_FREE;

	in->seg.xlt_oct_size = cpu_to_be32(ndescs);

	in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);

	in->seg.flags_pd = cpu_to_be32(to_mpd(pd)->pdn);

	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);

	MLX5_SET(mkc, mkc, free, 1);

	MLX5_SET(mkc, mkc, translations_octword_size, ndescs);

	MLX5_SET(mkc, mkc, qpn, 0xffffff);

	MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);



	if (mr_type == IB_MR_TYPE_MEM_REG) {

		mr->access_mode = MLX5_ACCESS_MODE_MTT;

		in->seg.log2_page_size = PAGE_SHIFT;



		mr->access_mode = MLX5_MKC_ACCESS_MODE_MTT;

		MLX5_SET(mkc, mkc, log_page_size, PAGE_SHIFT);

		err = mlx5_alloc_priv_descs(pd->device, mr,

					    ndescs, sizeof(u64));

		if (err)
@@ -1555,7 +1574,7 @@ struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd, 
		mr->desc_size = sizeof(u64);

		mr->max_descs = ndescs;

	} else if (mr_type == IB_MR_TYPE_SG_GAPS) {

		mr->access_mode = MLX5_ACCESS_MODE_KLM;

		mr->access_mode = MLX5_MKC_ACCESS_MODE_KLMS;



		err = mlx5_alloc_priv_descs(pd->device, mr,

					    ndescs, sizeof(struct mlx5_klm));
@@ -1566,9 +1585,8 @@ struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd, 
	} else if (mr_type == IB_MR_TYPE_SIGNATURE) {

		u32 psv_index[2];



		in->seg.flags_pd = cpu_to_be32(be32_to_cpu(in->seg.flags_pd) |

							   MLX5_MKEY_BSF_EN);

		in->seg.bsfs_octo_size = cpu_to_be32(MLX5_MKEY_BSF_OCTO_SIZE);

		MLX5_SET(mkc, mkc, bsf_en, 1);

		MLX5_SET(mkc, mkc, bsf_octword_size, MLX5_MKEY_BSF_OCTO_SIZE);

		mr->sig = kzalloc(sizeof(*mr->sig), GFP_KERNEL);

		if (!mr->sig) {

			err = -ENOMEM;
@@ -1581,7 +1599,7 @@ struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd, 
		if (err)

			goto err_free_sig;



		mr->access_mode = MLX5_ACCESS_MODE_KLM;

		mr->access_mode = MLX5_MKC_ACCESS_MODE_KLMS;

		mr->sig->psv_memory.psv_idx = psv_index[0];

		mr->sig->psv_wire.psv_idx = psv_index[1];
@@ -1595,9 +1613,10 @@ struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd, 
		goto err_free_in;

	}



	in->seg.flags = MLX5_PERM_UMR_EN | mr->access_mode;

	err = mlx5_core_create_mkey(dev->mdev, &mr->mmkey, in, sizeof(*in),

				    NULL, NULL, NULL);

	MLX5_SET(mkc, mkc, access_mode, mr->access_mode);

	MLX5_SET(mkc, mkc, umr_en, 1);



	err = mlx5_core_create_mkey(dev->mdev, &mr->mmkey, in, inlen);

	if (err)

		goto err_destroy_psv;
@@ -1633,8 +1652,10 @@ struct ib_mw *mlx5_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type, 
			       struct ib_udata *udata)

{

	struct mlx5_ib_dev *dev = to_mdev(pd->device);

	struct mlx5_create_mkey_mbox_in *in = NULL;

	int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);

	struct mlx5_ib_mw *mw = NULL;

	u32 *in = NULL;

	void *mkc;

	int ndescs;

	int err;

	struct mlx5_ib_alloc_mw req = {};
@@ -1658,23 +1679,24 @@ struct ib_mw *mlx5_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type, 
	ndescs = req.num_klms ? roundup(req.num_klms, 4) : roundup(1, 4);



	mw = kzalloc(sizeof(*mw), GFP_KERNEL);

	in = kzalloc(sizeof(*in), GFP_KERNEL);

	in = kzalloc(inlen, GFP_KERNEL);

	if (!mw || !in) {

		err = -ENOMEM;

		goto free;

	}



	in->seg.status = MLX5_MKEY_STATUS_FREE;

	in->seg.xlt_oct_size = cpu_to_be32(ndescs);

	in->seg.flags_pd = cpu_to_be32(to_mpd(pd)->pdn);

	in->seg.flags = MLX5_PERM_UMR_EN | MLX5_ACCESS_MODE_KLM |

		MLX5_PERM_LOCAL_READ;

	if (type == IB_MW_TYPE_2)

		in->seg.flags_pd |= cpu_to_be32(MLX5_MKEY_REMOTE_INVAL);

	in->seg.qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);

	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);



	MLX5_SET(mkc, mkc, free, 1);

	MLX5_SET(mkc, mkc, translations_octword_size, ndescs);

	MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);

	MLX5_SET(mkc, mkc, umr_en, 1);

	MLX5_SET(mkc, mkc, lr, 1);

	MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_KLMS);

	MLX5_SET(mkc, mkc, en_rinval, !!((type == IB_MW_TYPE_2)));

	MLX5_SET(mkc, mkc, qpn, 0xffffff);



	err = mlx5_core_create_mkey(dev->mdev, &mw->mmkey, in, sizeof(*in),

				    NULL, NULL, NULL);

	err = mlx5_core_create_mkey(dev->mdev, &mw->mmkey, in, inlen);

	if (err)

		goto free;
@@ -1811,7 +1833,7 @@ int mlx5_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, 
				   mr->desc_size * mr->max_descs,

				   DMA_TO_DEVICE);



	if (mr->access_mode == MLX5_ACCESS_MODE_KLM)

	if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS)

		n = mlx5_ib_sg_to_klms(mr, sg, sg_nents, sg_offset);

	else

		n = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset,

drivers/infiniband/hw/mlx5/qp.c

+95 −94

File changed.

Preview size limit exceeded, changes collapsed.

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