Commit 013044cc authored by James Hogan's avatar James Hogan
Browse files

KVM: MIPS/T&E: Expose CP0_EntryLo0/1 registers 



Expose the CP0_EntryLo0 and CP0_EntryLo1 registers through the KVM
register access API. This is fairly straightforward for trap & emulate
since we don't support the RI and XI bits. For the sake of future
proofing (particularly for VZ) it is explicitly specified that the API
always exposes the 64-bit version of these registers (i.e. with the RI
and XI bits in bit positions 63 and 62 respectively), and they are
implemented in trap_emul.c rather than mips.c to allow them to be
implemented differently for VZ.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
parent be67a0be

Documentation/virtual/kvm/api.txt

+8 −0
Original line number Diff line number Diff line
@@ -2061,6 +2061,8 @@ registers, find a list below: 
  MIPS  | KVM_REG_MIPS_LO               | 64

  MIPS  | KVM_REG_MIPS_PC               | 64

  MIPS  | KVM_REG_MIPS_CP0_INDEX        | 32

  MIPS  | KVM_REG_MIPS_CP0_ENTRYLO0     | 64

  MIPS  | KVM_REG_MIPS_CP0_ENTRYLO1     | 64

  MIPS  | KVM_REG_MIPS_CP0_CONTEXT      | 64

  MIPS  | KVM_REG_MIPS_CP0_USERLOCAL    | 64

  MIPS  | KVM_REG_MIPS_CP0_PAGEMASK     | 32
@@ -2149,6 +2151,12 @@ patterns depending on whether they're 32-bit or 64-bit registers: 
  0x7020 0000 0001 00 <reg:5> <sel:3>   (32-bit)

  0x7030 0000 0001 00 <reg:5> <sel:3>   (64-bit)



Note: KVM_REG_MIPS_CP0_ENTRYLO0 and KVM_REG_MIPS_CP0_ENTRYLO1 are the MIPS64

versions of the EntryLo registers regardless of the word size of the host

hardware, host kernel, guest, and whether XPA is present in the guest, i.e.

with the RI and XI bits (if they exist) in bits 63 and 62 respectively, and

the PFNX field starting at bit 30.



MIPS KVM control registers (see above) have the following id bit patterns:

  0x7030 0000 0002 <reg:16>

arch/mips/include/asm/kvm_host.h

+2 −0
Original line number Diff line number Diff line
@@ -352,7 +352,9 @@ struct kvm_vcpu_arch { 
#define kvm_read_c0_guest_index(cop0)		(cop0->reg[MIPS_CP0_TLB_INDEX][0])

#define kvm_write_c0_guest_index(cop0, val)	(cop0->reg[MIPS_CP0_TLB_INDEX][0] = val)

#define kvm_read_c0_guest_entrylo0(cop0)	(cop0->reg[MIPS_CP0_TLB_LO0][0])

#define kvm_write_c0_guest_entrylo0(cop0, val)	(cop0->reg[MIPS_CP0_TLB_LO0][0] = (val))

#define kvm_read_c0_guest_entrylo1(cop0)	(cop0->reg[MIPS_CP0_TLB_LO1][0])

#define kvm_write_c0_guest_entrylo1(cop0, val)	(cop0->reg[MIPS_CP0_TLB_LO1][0] = (val))

#define kvm_read_c0_guest_context(cop0)		(cop0->reg[MIPS_CP0_TLB_CONTEXT][0])

#define kvm_write_c0_guest_context(cop0, val)	(cop0->reg[MIPS_CP0_TLB_CONTEXT][0] = (val))

#define kvm_read_c0_guest_userlocal(cop0)	(cop0->reg[MIPS_CP0_TLB_CONTEXT][2])

arch/mips/kvm/trap_emul.c

+14 −0
Original line number Diff line number Diff line
@@ -646,6 +646,8 @@ static void kvm_trap_emul_flush_shadow_memslot(struct kvm *kvm, 


static u64 kvm_trap_emul_get_one_regs[] = {

	KVM_REG_MIPS_CP0_INDEX,

	KVM_REG_MIPS_CP0_ENTRYLO0,

	KVM_REG_MIPS_CP0_ENTRYLO1,

	KVM_REG_MIPS_CP0_CONTEXT,

	KVM_REG_MIPS_CP0_USERLOCAL,

	KVM_REG_MIPS_CP0_PAGEMASK,
@@ -706,6 +708,12 @@ static int kvm_trap_emul_get_one_reg(struct kvm_vcpu *vcpu, 
	case KVM_REG_MIPS_CP0_INDEX:

		*v = (long)kvm_read_c0_guest_index(cop0);

		break;

	case KVM_REG_MIPS_CP0_ENTRYLO0:

		*v = kvm_read_c0_guest_entrylo0(cop0);

		break;

	case KVM_REG_MIPS_CP0_ENTRYLO1:

		*v = kvm_read_c0_guest_entrylo1(cop0);

		break;

	case KVM_REG_MIPS_CP0_CONTEXT:

		*v = (long)kvm_read_c0_guest_context(cop0);

		break;
@@ -817,6 +825,12 @@ static int kvm_trap_emul_set_one_reg(struct kvm_vcpu *vcpu, 
	case KVM_REG_MIPS_CP0_INDEX:

		kvm_write_c0_guest_index(cop0, v);

		break;

	case KVM_REG_MIPS_CP0_ENTRYLO0:

		kvm_write_c0_guest_entrylo0(cop0, v);

		break;

	case KVM_REG_MIPS_CP0_ENTRYLO1:

		kvm_write_c0_guest_entrylo1(cop0, v);

		break;

	case KVM_REG_MIPS_CP0_CONTEXT:

		kvm_write_c0_guest_context(cop0, v);

		break;

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