ARM: mvebu: prepare set_cpu_coherent() for future extension (01049a5d) · Commits · 戴 / test

This patch prepares the set_cpu_coherent() function in coherency.c to be extended to support other SoCs than Armada XP. It will be needed on Armada 38x to re-enable the coherency after exiting from suspend to RAM. This preparation simply moves the function further down in coherency.c so that it can use coherency_type(), and uses that function to only do the Armada XP specific work if we are on Armada XP. Signed-off-by:

Nadav Haklai <nadavh@marvell.com> Signed-off-by:

Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by:

Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:

Gregory CLEMENT <gregory.clement@free-electrons.com>

arch/arm/mach-mvebu/coherency.c

+17 −12

Original line number	Diff line number	Diff line
		@@ -65,18 +65,6 @@ static const struct of_device_id of_coherency_table[] = {
		int ll_enable_coherency(void);
		void ll_add_cpu_to_smp_group(void);

		int set_cpu_coherent(void)
		{
		if (!coherency_base) {
		pr_warn("Can't make current CPU cache coherent.\n");
		pr_warn("Coherency fabric is not initialized\n");
		return 1;
		}

		ll_add_cpu_to_smp_group();
		return ll_enable_coherency();
		}

		static int mvebu_hwcc_notifier(struct notifier_block *nb,
		unsigned long event, void *__dev)
		{
		@@ -206,6 +194,23 @@ static int coherency_type(void)
		return type;
		}

		int set_cpu_coherent(void)
		{
		int type = coherency_type();

		if (type == COHERENCY_FABRIC_TYPE_ARMADA_370_XP) {
		if (!coherency_base) {
		pr_warn("Can't make current CPU cache coherent.\n");
		pr_warn("Coherency fabric is not initialized\n");
		return 1;
		}
		ll_add_cpu_to_smp_group();
		return ll_enable_coherency();
		}

		return 0;
		}

		int coherency_available(void)
		{
		return coherency_type() != COHERENCY_FABRIC_TYPE_NONE;

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