Commit 00d082cc authored Mar 06, 2019 by Laurent Pinchart

drm: rcar-du: lvds: Set LVEN and LVRES bits together on D3

On the D3 SoC the LVDS PHY must be enabled in the same register write
that enables the LVDS output. Skip writing the LVEN bit independently
on that platform, it will be set by the write that sets LVRES.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

parent 87137030

drivers/gpu/drm/rcar-du/rcar_lvds.c

+6 −2

Original line number	Diff line number	Diff line
		@@ -485,8 +485,12 @@ static void rcar_lvds_enable(struct drm_bridge *bridge)
		}

		if (lvds->info->quirks & RCAR_LVDS_QUIRK_GEN3_LVEN) {
		/* Turn on the LVDS PHY. */
		/*
		* Turn on the LVDS PHY. On D3, the LVEN and LVRES bit must be
		* set at the same time, so don't write the register yet.
		*/
		lvdcr0 \|= LVDCR0_LVEN;
		if (!(lvds->info->quirks & RCAR_LVDS_QUIRK_PWD))
		rcar_lvds_write(lvds, LVDCR0, lvdcr0);
		}