Commit 0083b91d authored by Martin Peres's avatar Martin Peres Committed by Ben Skeggs
Browse files

drm/nouveau/therm: implement support for temperature alarms 



For now, we only boost the fan speed to the maximum and auto-mode
when hitting the FAN_BOOST threshold and halt the computer when it
reaches the shutdown temperature. The downclock and critical thresholds
do nothing.

On nv43:50 and nva3+, temperature is polled because of the limited hardware.
I'll improve the nva3+ situation by implementing alarm management in PDAEMON
whenever I can but polling once every second shouldn't be such a problem.

v2 (Ben Skeggs):
- rebased

v3: fixed false-detections and threshold reprogrammation handling on nv50:nvc0

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Signed-off-by: default avatarMartin Peres <martin.peres@labri.fr>
parent 9d7175c8

drivers/gpu/drm/nouveau/core/os.h

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <linux/vmalloc.h>

#include <linux/acpi.h>

#include <linux/dmi.h>

#include <linux/reboot.h>



#include <asm/unaligned.h>

drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ nv98_mc_intr[] = { 
	{ 0x00001000, NVDEV_ENGINE_GR },

	{ 0x00004000, NVDEV_ENGINE_CRYPT },	/* NV84:NVA3 */

	{ 0x00008000, NVDEV_ENGINE_BSP },

	{ 0x00080000, NVDEV_SUBDEV_THERM },	/* NVA3:NVC0 */

	{ 0x00100000, NVDEV_SUBDEV_TIMER },

	{ 0x00200000, NVDEV_SUBDEV_GPIO },

	{ 0x00400000, NVDEV_ENGINE_COPY0 },	/* NVA3-     */

drivers/gpu/drm/nouveau/core/subdev/therm/base.c

+10 −1
Original line number Diff line number Diff line
@@ -123,7 +123,7 @@ nouveau_therm_alarm(struct nouveau_alarm *alarm) 
	nouveau_therm_update(&priv->base, -1);

}



static int

int

nouveau_therm_mode(struct nouveau_therm *therm, int mode)

{

	struct nouveau_therm_priv *priv = (void *)therm;
@@ -212,27 +212,35 @@ nouveau_therm_attr_set(struct nouveau_therm *therm, 
		return nouveau_therm_mode(therm, value);

	case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST:

		priv->bios_sensor.thrs_fan_boost.temp = value;

		priv->sensor.program_alarms(therm);

		return 0;

	case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST_HYST:

		priv->bios_sensor.thrs_fan_boost.hysteresis = value;

		priv->sensor.program_alarms(therm);

		return 0;

	case NOUVEAU_THERM_ATTR_THRS_DOWN_CLK:

		priv->bios_sensor.thrs_down_clock.temp = value;

		priv->sensor.program_alarms(therm);

		return 0;

	case NOUVEAU_THERM_ATTR_THRS_DOWN_CLK_HYST:

		priv->bios_sensor.thrs_down_clock.hysteresis = value;

		priv->sensor.program_alarms(therm);

		return 0;

	case NOUVEAU_THERM_ATTR_THRS_CRITICAL:

		priv->bios_sensor.thrs_critical.temp = value;

		priv->sensor.program_alarms(therm);

		return 0;

	case NOUVEAU_THERM_ATTR_THRS_CRITICAL_HYST:

		priv->bios_sensor.thrs_critical.hysteresis = value;

		priv->sensor.program_alarms(therm);

		return 0;

	case NOUVEAU_THERM_ATTR_THRS_SHUTDOWN:

		priv->bios_sensor.thrs_shutdown.temp = value;

		priv->sensor.program_alarms(therm);

		return 0;

	case NOUVEAU_THERM_ATTR_THRS_SHUTDOWN_HYST:

		priv->bios_sensor.thrs_shutdown.hysteresis = value;

		priv->sensor.program_alarms(therm);

		return 0;

	}
@@ -253,6 +261,7 @@ _nouveau_therm_init(struct nouveau_object *object) 
	if (priv->fan->percent >= 0)

		therm->fan_set(therm, priv->fan->percent);



	priv->sensor.program_alarms(therm);

	return 0;

}

drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c

+17 −0
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ nv40_sensor_setup(struct nouveau_therm *therm) 
	if (device->chipset >= 0x46) {

		nv_mask(therm, 0x15b8, 0x80000000, 0);

		nv_wr32(therm, 0x15b0, 0x80003fff);

		mdelay(10); /* wait for the temperature to stabilize */

		return nv_rd32(therm, 0x15b4) & 0x3fff;

	} else {

		nv_wr32(therm, 0x15b0, 0xff);
@@ -135,6 +136,20 @@ nv40_fan_pwm_set(struct nouveau_therm *therm, int line, u32 divs, u32 duty) 
	return 0;

}



static void

nv40_therm_intr(struct nouveau_subdev *subdev)

{

	struct nouveau_therm *therm = nouveau_therm(subdev);

	uint32_t stat = nv_rd32(therm, 0x1100);



	/* traitement */



	/* ack all IRQs */

	nv_wr32(therm, 0x1100, 0x70000);



	nv_error(therm, "THERM received an IRQ: stat = %x\n", stat);

}



static int

nv40_therm_ctor(struct nouveau_object *parent,

		struct nouveau_object *engine,
@@ -153,6 +168,8 @@ nv40_therm_ctor(struct nouveau_object *parent, 
	priv->base.base.pwm_get = nv40_fan_pwm_get;

	priv->base.base.pwm_set = nv40_fan_pwm_set;

	priv->base.base.temp_get = nv40_temp_get;

	priv->base.sensor.program_alarms = nouveau_therm_program_alarms_polling;

	nv_subdev(priv)->intr = nv40_therm_intr;

	return nouveau_therm_preinit(&priv->base.base);

}

drivers/gpu/drm/nouveau/core/subdev/therm/nv50.c

+153 −0
Original line number Diff line number Diff line
@@ -124,6 +124,141 @@ nv50_temp_get(struct nouveau_therm *therm) 
	return nv_rd32(therm, 0x20400);

}



static void

nv50_therm_program_alarms(struct nouveau_therm *therm)

{

	struct nouveau_therm_priv *priv = (void *)therm;

	struct nvbios_therm_sensor *sensor = &priv->bios_sensor;

	unsigned long flags;



	spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);



	/* enable RISING and FALLING IRQs for shutdown, THRS 0, 1, 2 and 4 */

	nv_wr32(therm, 0x20000, 0x000003ff);



	/* shutdown: The computer should be shutdown when reached */

	nv_wr32(therm, 0x20484, sensor->thrs_shutdown.hysteresis);

	nv_wr32(therm, 0x20480, sensor->thrs_shutdown.temp);



	/* THRS_1 : fan boost*/

	nv_wr32(therm, 0x204c4, sensor->thrs_fan_boost.temp);



	/* THRS_2 : critical */

	nv_wr32(therm, 0x204c0, sensor->thrs_critical.temp);



	/* THRS_4 : down clock */

	nv_wr32(therm, 0x20414, sensor->thrs_down_clock.temp);

	spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);



	nv_info(therm,

		"Programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n",

		sensor->thrs_fan_boost.temp, sensor->thrs_fan_boost.hysteresis,

		sensor->thrs_down_clock.temp,

		sensor->thrs_down_clock.hysteresis,

		sensor->thrs_critical.temp, sensor->thrs_critical.hysteresis,

		sensor->thrs_shutdown.temp, sensor->thrs_shutdown.hysteresis);



}



/* must be called with alarm_program_lock taken ! */

static void

nv50_therm_threshold_hyst_emulation(struct nouveau_therm *therm,

				   uint32_t thrs_reg, u8 status_bit,

				   const struct nvbios_therm_threshold *thrs,

				   enum nouveau_therm_thrs thrs_name)

{

	enum nouveau_therm_thrs_direction direction;

	enum nouveau_therm_thrs_state prev_state, new_state;

	int temp, cur;



	prev_state = nouveau_therm_sensor_get_threshold_state(therm, thrs_name);

	temp = nv_rd32(therm, thrs_reg);



	/* program the next threshold */

	if (temp == thrs->temp) {

		nv_wr32(therm, thrs_reg, thrs->temp - thrs->hysteresis);

		new_state = NOUVEAU_THERM_THRS_HIGHER;

	} else {

		nv_wr32(therm, thrs_reg, thrs->temp);

		new_state = NOUVEAU_THERM_THRS_LOWER;

	}



	/* fix the state (in case someone reprogrammed the alarms) */

	cur = therm->temp_get(therm);

	if (new_state == NOUVEAU_THERM_THRS_LOWER && cur > thrs->temp)

		new_state = NOUVEAU_THERM_THRS_HIGHER;

	else if (new_state == NOUVEAU_THERM_THRS_HIGHER &&

		cur < thrs->temp - thrs->hysteresis)

		new_state = NOUVEAU_THERM_THRS_LOWER;

	nouveau_therm_sensor_set_threshold_state(therm, thrs_name, new_state);



	/* find the direction */

	if (prev_state < new_state)

		direction = NOUVEAU_THERM_THRS_RISING;

	else if (prev_state > new_state)

		direction = NOUVEAU_THERM_THRS_FALLING;

	else

		return;



	/* advertise a change in direction */

	nouveau_therm_sensor_event(therm, thrs_name, direction);

}



static void

nv50_therm_intr(struct nouveau_subdev *subdev)

{

	struct nouveau_therm *therm = nouveau_therm(subdev);

	struct nouveau_therm_priv *priv = (void *)therm;

	struct nvbios_therm_sensor *sensor = &priv->bios_sensor;

	unsigned long flags;

	uint32_t intr;



	spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags);



	intr = nv_rd32(therm, 0x20100);



	/* THRS_4: downclock */

	if (intr & 0x002) {

		nv50_therm_threshold_hyst_emulation(therm, 0x20414, 24,

						  &sensor->thrs_down_clock,

						  NOUVEAU_THERM_THRS_DOWNCLOCK);

		intr &= ~0x002;

	}



	/* shutdown */

	if (intr & 0x004) {

		nv50_therm_threshold_hyst_emulation(therm, 0x20480, 20,

						   &sensor->thrs_shutdown,

						   NOUVEAU_THERM_THRS_SHUTDOWN);

		intr &= ~0x004;

	}



	/* THRS_1 : fan boost */

	if (intr & 0x008) {

		nv50_therm_threshold_hyst_emulation(therm, 0x204c4, 21,

						   &sensor->thrs_fan_boost,

						   NOUVEAU_THERM_THRS_FANBOOST);

		intr &= ~0x008;

	}



	/* THRS_2 : critical */

	if (intr & 0x010) {

		nv50_therm_threshold_hyst_emulation(therm, 0x204c0, 22,

						   &sensor->thrs_critical,

						   NOUVEAU_THERM_THRS_CRITICAL);

		intr &= ~0x010;

	}



	if (intr)

		nv_error(therm, "unhandled intr 0x%08x\n", intr);



	/* ACK everything */

	nv_wr32(therm, 0x20100, 0xffffffff);

	nv_wr32(therm, 0x1100, 0x10000); /* PBUS */



	spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags);

}



static int

nv50_therm_ctor(struct nouveau_object *parent,

		struct nouveau_object *engine,
@@ -143,6 +278,24 @@ nv50_therm_ctor(struct nouveau_object *parent, 
	priv->base.base.pwm_set = nv50_fan_pwm_set;

	priv->base.base.pwm_clock = nv50_fan_pwm_clock;

	priv->base.base.temp_get = nv50_temp_get;

	priv->base.sensor.program_alarms = nv50_therm_program_alarms;

	spin_lock_init(&priv->base.sensor.alarm_program_lock);

	nv_subdev(priv)->intr = nv50_therm_intr;



	/* init the thresholds */

	nouveau_therm_sensor_set_threshold_state(&priv->base.base,

						 NOUVEAU_THERM_THRS_SHUTDOWN,

						 NOUVEAU_THERM_THRS_LOWER);

	nouveau_therm_sensor_set_threshold_state(&priv->base.base,

						 NOUVEAU_THERM_THRS_FANBOOST,

						 NOUVEAU_THERM_THRS_LOWER);

	nouveau_therm_sensor_set_threshold_state(&priv->base.base,

						 NOUVEAU_THERM_THRS_CRITICAL,

						 NOUVEAU_THERM_THRS_LOWER);

	nouveau_therm_sensor_set_threshold_state(&priv->base.base,

						 NOUVEAU_THERM_THRS_DOWNCLOCK,

						 NOUVEAU_THERM_THRS_LOWER);



	return nouveau_therm_preinit(&priv->base.base);

}

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