Commit 0042fca5 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: enable gfx cgcg on CIK APUs 



Enable coarse grained clockgating.  This works properly now
that smc is initialized earlier than the rlc and cp.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 92598db0

drivers/gpu/drm/radeon/radeon_asic.c

+2 −2
Original line number Diff line number Diff line
@@ -2504,7 +2504,7 @@ int radeon_asic_init(struct radeon_device *rdev) 
			rdev->cg_flags =

				RADEON_CG_SUPPORT_GFX_MGCG |

				RADEON_CG_SUPPORT_GFX_MGLS |

				/*RADEON_CG_SUPPORT_GFX_CGCG |*/

				RADEON_CG_SUPPORT_GFX_CGCG |

				RADEON_CG_SUPPORT_GFX_CGLS |

				RADEON_CG_SUPPORT_GFX_CGTS |

				RADEON_CG_SUPPORT_GFX_CGTS_LS |
@@ -2532,7 +2532,7 @@ int radeon_asic_init(struct radeon_device *rdev) 
			rdev->cg_flags =

				RADEON_CG_SUPPORT_GFX_MGCG |

				RADEON_CG_SUPPORT_GFX_MGLS |

				/*RADEON_CG_SUPPORT_GFX_CGCG |*/

				RADEON_CG_SUPPORT_GFX_CGCG |

				RADEON_CG_SUPPORT_GFX_CGLS |

				RADEON_CG_SUPPORT_GFX_CGTS |

				RADEON_CG_SUPPORT_GFX_CGTS_LS |

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