Commit ff167995 authored by Filip Kokosinski's avatar Filip Kokosinski Committed by Maureen Helm
Browse files

dts: bindings: sram: add SiFive dtim0 bindings 



Add bindings for SiFive Data Tightly-Integrated Memory.

Signed-off-by: default avatarFilip Kokosinski <fkokosinski@internships.antmicro.com>
Signed-off-by: default avatarMateusz Holenko <mholenko@antmicro.com>
parent 43492817

CODEOWNERS

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/dts/bindings/*/openisa*                  @MaureenHelm

/dts/bindings/*/st*                       @erwango

/dts/bindings/sensor/ams*                 @alexanderwachter

/dts/bindings/*/sifive*                   @mateusz-holenko @kgugala @pgielda @nategraff-sifive

/ext/fs/                                  @nashif @wentongwu

/ext/hal/atmel/asf/sam/include/same70*/   @aurel32

/ext/hal/atmel/asf/sam0/include/samr21/   @benpicco

dts/bindings/sram/sifive,dtim0.yaml

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#

# Copyright (c) 2019 Antmicro <www.antmicro.com>

#

# SPDX-License-Identifier: Apache-2.0

#

---

title: Data Tightly-Integrated Memory

version: 0.1



description: >

    This bindings describes the SiFive Data Tightly-Integrated Memory



properties:

    compatible:

      type: string

      category: required

      description: compatible strings

      constraint: "sifive,dtim0"

      generation: define



    reg:

      type: array

      description: mmio register space

      generation: define

      category: required



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