Commit f75e3bad authored by Danh Doan's avatar Danh Doan Committed by Benjamin Cabé
Browse files

dts: arm: renesas: add PWM support for Renesas RA6, RA4, RA2 

Add PWM support for RA6, RA4, RA2 MCU: ra6-cm4, ra6-cm33,
ra4-cm4, ra4-cm33, ra2xx

Signed-off-by: default avatarDanh Doan <danh.doan.ue@bp.renesas.com>
parent 90b810f9

dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi

+61 −0
Changes for dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi: 61 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 


#include <arm/renesas/ra/ra2/ra2xx.dtsi>

#include <zephyr/dt-bindings/clock/ra_clock.h>

#include <zephyr/dt-bindings/pwm/ra_pwm.h>



/delete-node/ &sci2;

/delete-node/ &sci3;
@@ -25,6 +26,66 @@ 
			interrupts = <16 1>, <17 1>, <18 1>, <19 1>;

			interrupt-names = "rxi", "txi", "tei", "eri";

		};



		pwm1: pwm1@40078100 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_1>;

			clocks = <&pclkd MSTPD 6>;

			reg = <0x40078100 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm2: pwm2@40078200 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_2>;

			clocks = <&pclkd MSTPD 6>;

			reg = <0x40078200 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm3: pwm3@40078300 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_3>;

			clocks = <&pclkd MSTPD 6>;

			reg = <0x40078300 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm4: pwm4@40078400 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_4>;

			clocks = <&pclkd MSTPD 6>;

			reg = <0x40078400 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm5: pwm5@40078500 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_5>;

			clocks = <&pclkd MSTPD 6>;

			reg = <0x40078500 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm6: pwm6@40078600 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_6>;

			clocks = <&pclkd MSTPD 6>;

			reg = <0x40078600 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};

	};



	clocks: clocks {

dts/arm/renesas/ra/ra2/ra2xx.dtsi

+11 −0
Changes for dts/arm/renesas/ra/ra2/ra2xx.dtsi: 11 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include <arm/armv8-m.dtsi>

#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>

#include <zephyr/dt-bindings/clock/ra_clock.h>

#include <zephyr/dt-bindings/pwm/ra_pwm.h>

#include <freq.h>



/ {
@@ -339,6 +340,16 @@ 
			#port-irq-cells = <0>;

			status = "disabled";

		};



		pwm0: pwm0@40078000 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_0>;

			clocks = <&pclkd MSTPD 5>;

			reg = <0x40078000 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};

	};

};

dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi

+41 −0
Changes for dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi: 41 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 


#include <arm/renesas/ra/ra4/ra4-cm33-common.dtsi>

#include <zephyr/dt-bindings/clock/ra_clock.h>

#include <zephyr/dt-bindings/pwm/ra_pwm.h>



/delete-node/ &spi1;
@@ -98,6 +99,46 @@ 
			channel-count = <13>;

			channel-available-mask = <0x139ff>;

		};



		pwm2: pwm2@40169200 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_2>;

			clocks = <&pclkd MSTPE 29>;

			reg = <0x40169200 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm3: pwm3@40169300 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_3>;

			clocks = <&pclkd MSTPE 28>;

			reg = <0x40169300 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm6: pwm6@40169600 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_6>;

			clocks = <&pclkd MSTPE 25>;

			reg = <0x40169600 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm7: pwm7@40169700 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_7>;

			clocks = <&pclkd MSTPE 24>;

			reg = <0x40169700 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};

	};



	clocks: clocks {

dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi

+41 −0
Changes for dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi: 41 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 


#include <arm/renesas/ra/ra4/ra4-cm33-common.dtsi>

#include <zephyr/dt-bindings/clock/ra_clock.h>

#include <zephyr/dt-bindings/pwm/ra_pwm.h>



/delete-node/ &spi1;
@@ -111,6 +112,46 @@ 
			channel-count = <10>;

			channel-available-mask = <0x7f0007>;

		};



		pwm2: pwm2@40169200 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_2>;

			clocks = <&pclkd MSTPE 29>;

			reg = <0x40169200 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm3: pwm3@40169300 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_3>;

			clocks = <&pclkd MSTPE 28>;

			reg = <0x40169300 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm6: pwm6@40169600 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_6>;

			clocks = <&pclkd MSTPE 25>;

			reg = <0x40169600 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};



		pwm7: pwm7@40169700 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_7>;

			clocks = <&pclkd MSTPE 24>;

			reg = <0x40169700 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};

	};



	clocks: clocks {

dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi

+11 −0
Changes for dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi: 11 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ 


#include <zephyr/dt-bindings/clock/ra_clock.h>

#include <arm/renesas/ra/ra4/ra4-cm4-common.dtsi>

#include <zephyr/dt-bindings/pwm/ra_pwm.h>



/delete-node/ &adc1;
@@ -53,6 +54,16 @@ 
			channel-count = <8>;

			channel-available-mask = <0x1a0670>;

		};



		pwm8: pwm8@40169800 {

			compatible = "renesas,ra-pwm";

			divider = <RA_PWM_SOURCE_DIV_1>;

			channel = <RA_PWM_CHANNEL_8>;

			clocks = <&pclkd MSTPD 6>;

			reg = <0x40169800 0x100>;

			#pwm-cells = <3>;

			status = "disabled";

		};

	};



	clocks: clocks {

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