soc: renesas: ra: ra6m5: clear NVIC->ITNS at startup for non TZ

Otherwise, interrupts will trigger a very funny fault
See https://github.com/arduino/ArduinoCore-renesas/blob/main/cores/arduino/main.cpp#L49-L57



Signed-off-by: Martino Facchin <m.facchin@arduino.cc>