Commit f634401f authored Jan 04, 2025 by Tristen Pierson Committed by Benjamin Cabé Jan 08, 2025

drivers: dma: sam0: Reset DMA during initialization.



Fixes issue #83555, where UART transmit operations fail in Zephyr
sysbuild projects using MCUboot and the asynchronous UART API
(`CONFIG_UART_ASYNC_API=y`) on SAM0 devices such as the
ATSAMC21G18A.

The issue occurs because the DMA controller is not reset during
initialization, causing `BASEADDR` and `WRBADDR` registers to retain
MCUboot's configuration. This prevents the application from reconfiguring
these registers to its own RAM addresses, leading to UART transmit
timeouts and triggering the `UART_TX_ABORTED` callback.

This patch resolves the issue by resetting the DMA controller during
initialization in `dma_sam0.c`. The following actions are performed:
- Disables the DMA and CRC modules.
- Applies a software reset to ensure a clean state for reconfiguration.

With this change, UART transmit operations work as expected, improving
stability and compatibility between MCUboot and the application.

Signed-off-by: Tristen Pierson <tpierson@electrohire.com>

parent 56517645

drivers/dma/dma_sam0.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -413,6 +413,13 @@ static int dma_sam0_init(const struct device *dev)
		PM->APBBMASK.bit.DMAC_ = 1;
		#endif

		/* Reset the DMA controller */
		DMAC->CTRL.bit.DMAENABLE = 0;
		DMAC->CTRL.bit.CRCENABLE = 0;
		DMAC->CTRL.bit.SWRST = 1;
		while (DMAC->CTRL.bit.SWRST) {
		}

		/* Set up the descriptor and write back addresses */
		DMA_REGS->BASEADDR.reg = (uintptr_t)&data->descriptors;
		DMA_REGS->WRBADDR.reg = (uintptr_t)&data->descriptors_wb;

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