Commit f28f4120 authored by Hao Luo's avatar Hao Luo Committed by Benjamin Cabé
Browse files

drivers: pinctrl: Add sdif configs to ambiq pinctrl driver 



Added sdio cd and wp pin configs to ambiq pinctrl driver

Signed-off-by: default avatarHao Luo <hluo@ambiq.com>
parent 4cfb1d3a

drivers/pinctrl/pinctrl_ambiq.c

+11 −0
Original line number Diff line number Diff line
@@ -45,6 +45,17 @@ static void pinctrl_configure_pin(const pinctrl_soc_pin_t *pin) 
	pin_config.GP.cfg_b.eDriveStrength = pin->drive_strength;

#if defined(CONFIG_SOC_SERIES_APOLLO4X)

	pin_config.GP.cfg_b.uSlewRate = pin->slew_rate;

	switch (pin->sdif_cdwp) {

	case 1:

		am_hal_gpio_cd_pin_config(pin->pin_num);

		break;

	case 2:

		am_hal_gpio_wp_pin_config(pin->pin_num);

		break;

	default:

		/* not a sdif pin */

		break;

	}

#else

	switch (pin->sdif_cdwp) {

	case 1:

dts/bindings/pinctrl/ambiq,apollo4-pinctrl.yaml

+8 −0
Original line number Diff line number Diff line
@@ -161,3 +161,11 @@ child-binding: 
          Polarity select for NCE

          LOW = 0x0 - Polarity is active low

          HIGH = 0x1 - Polarity is active high

      ambiq,sdif-cdwp:

        type: int

        default: 0

        description: |

          Configure SD Card Detection and Write Protection pin

          0x0 - Not SDIF pin

          0x1 - SDIFCD

          0x2 - SDIFWP

soc/ambiq/apollo4x/pinctrl_soc.h

+3 −0
Original line number Diff line number Diff line
@@ -39,6 +39,8 @@ struct apollo4_pinctrl_soc_pin { 
	uint32_t nce : 6;

	/** nCE module polarity */

	uint32_t nce_pol: 1;

	/** SDIF CD WP pad select */

	uint32_t sdif_cdwp: 2;

};



typedef struct apollo4_pinctrl_soc_pin pinctrl_soc_pin_t;
@@ -65,6 +67,7 @@ typedef struct apollo4_pinctrl_soc_pin pinctrl_soc_pin_t; 
		DT_ENUM_IDX(node_id, ambiq_pull_up_ohms),                                          \

		DT_PROP(node_id, ambiq_nce_src),                                                   \

		DT_PROP(node_id, ambiq_nce_pol),                                                   \

		DT_PROP(node_id, ambiq_sdif_cdwp),                                                 \

	},



/**

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