drivers: counter: sam_tc: Big fix for alarm 1

Issue: the alarm 1 do not generate interrupt
There are three compare registers in a SAM TC channel:
RA --> alarm 0
RB --> alarm 1
RC --> top_value
By default the RB/TOIB was configured as an input and no longer
generates interrupt.
Set the direction of TIOB to output for alarm 1 interrupt.

Fixes zephyrproject-rtos/zephyr#85018

Signed-off-by: CHEN Xing <xing.chen@microchip.com>