drivers: flash: Add MAX32 SPIXF NOR flash driver (ecf7f846) · Commits · Wenxi XU / zephyr

drivers/flash/CMakeLists.txt

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		@@ -24,6 +24,7 @@ zephyr_library_sources_ifdef(CONFIG_USERSPACE flash_handlers.c)
		# zephyr-keep-sorted-stop

		# zephyr-keep-sorted-start
		zephyr_library_sources_ifdef(CONFIG_FLASH_ADI_MAX32_SPIXF flash_max32_spixf_nor.c)
		zephyr_library_sources_ifdef(CONFIG_FLASH_AMBIQ flash_ambiq.c)
		zephyr_library_sources_ifdef(CONFIG_FLASH_ANDES_QSPI flash_andes_qspi.c)
		zephyr_library_sources_ifdef(CONFIG_FLASH_CAD_QSPI_NOR flash_cadence_qspi_nor.c flash_cadence_qspi_nor_ll.c)

drivers/flash/Kconfig

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		@@ -164,6 +164,7 @@ config FLASH_INIT_PRIORITY
		initialization priority

		# zephyr-keep-sorted-start
		source "drivers/flash/Kconfig.adi_max32_spixf"
		source "drivers/flash/Kconfig.ambiq"
		source "drivers/flash/Kconfig.andes"
		source "drivers/flash/Kconfig.at45"

drivers/flash/Kconfig.adi_max32_spixf

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		# ADI MAX32 SPIXF Quad SPI flash driver configuration

		# Copyright (c) 2025 Analog Devices, Inc
		# SPDX-License-Identifier: Apache-2.0

		config FLASH_ADI_MAX32_SPIXF
		bool "ADI MAX32 SPIXF Quad SPI Flash driver"
		default y
		depends on DT_HAS_ADI_MAX32_SPIXF_NOR_ENABLED
		select FLASH_HAS_DRIVER_ENABLED
		select FLASH_JESD216
		select FLASH_HAS_PAGE_LAYOUT
		select FLASH_HAS_EXPLICIT_ERASE
		select PINCTRL
		help
		Enable QSPI-NOR support on the MAX32 family of processors.

drivers/flash/flash_max32_spixf_nor.c

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File added.

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dts/bindings/flash_controller/adi,max32-spixf-nor.yaml

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		# Copyright (c) 2025 Analog Devices, Inc
		# SPDX-License-Identifier: Apache-2.0

		description: \|
		MAX32 SPIXF NOR Flash controller supporting the JEDEC CFI interface

		Representation of a serial flash on a SPIXF bus:

		mx25u64: mx25u6432f@0 {
		compatible = "adi,max32-spixf-nor";
		reg = <0x0 DT_SIZE_M(8)>; /* 64 Mbits */
		qspi-max-frequency = <80000000>;
		jedec-id = [c2 37 25];
		reset-cmd;
		spi-bus-width = <4>;
		writeoc = "PP_1_1_4";
		status = "okay";
		};

		compatible: "adi,max32-spixf-nor"

		include: ["flash-controller.yaml", "jedec,jesd216.yaml", "jedec,spi-nor-common.yaml"]

		on-bus: qspi

		properties:
		reg:
		required: true
		description: Flash Memory base address and size in bytes
		qspi-max-frequency:
		type: int
		required: true
		description: Maximum clock frequency of device's QSPI interface in Hz
		reset-gpios:
		type: phandle-array
		description: RESETn pin
		reset-gpios-duration:
		type: int
		description: The duration (in ms) for the flash memory reset pulse
		reset-cmd:
		type: boolean
		description: Send reset command on initialization
		reset-cmd-wait:
		type: int
		default: 35
		description: \|
		The duration (in us) to wait after reset command. The default value of
		35us is long enough for commonly used NOR flash, but this can be
		adjusted as needed based on the specific flash used.
		spi-bus-width:
		type: int
		description: The width of (Q)SPI bus to which flash memory is connected.
		Now only value of 4 (when using SIO[0123]) is supported.
		writeoc:
		type: string
		enum:
		- "PP_1_1_4" # Quad data line SPI, PP 1-1-4 (0x32)
		- "PP_1_4_4" # Quad data line SPI, PP 1-4-4 (0x38)
		description: \|
		The value encodes number of I/O lines used for the opcode,
		address, and data.

		There is no info about quad page program opcodes in the SFDP
		tables, hence it has been assumed that NOR flash memory
		supporting 1-4-4 mode also would support fast page programming.

		If absent, then 1-4-4 program page is used in quad mode.

		force-quad-address-write:
		type: boolean
		description: \|
		Force 4 I/O lines for addressing even when using PP_1_1_4 writes.
		This is mostly useful for Microchip NOR flash which require this quirk.

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