Commit e4a95037 authored by Adrian Warecki's avatar Adrian Warecki Committed by Carles Cufi
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mm: tlb: Improve the context saving function

Attempt to invalidate cache for an unmapped address results in cpu
exception for the ptl platform. Perform cache invalidation after
translation activation in tlb. Add address mapping in mmu for platforms
that have it.

Signed-off-by: default avatarAdrian Warecki <adrian.warecki@intel.com>
parent 750212c2
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+13 −6
Changes for drivers/mm/mm_drv_intel_adsp_mtl_tlb.c: 13 added lines, 6 removed lines.
Original line number Diff line number Diff line
@@ -836,18 +836,25 @@ static void adsp_mm_save_context(void *storage_buffer)

		if (((tlb_entries[entry_idx] & TLB_PADDR_MASK) != entry) ||
		    ((tlb_entries[entry_idx] & TLB_ENABLE_BIT) != TLB_ENABLE_BIT)) {
			/* this page needs remapping, invalidate cache to avoid stalled data
			 * all cache data has been flushed before
			 * do this for pages to remap only
			 */
			sys_cache_data_invd_range(UINT_TO_POINTER(phys_addr),
						  CONFIG_MM_DRV_PAGE_SIZE);
			/* This page needs remapping */

			/* Enable the translation in the TLB entry */
			entry |= TLB_ENABLE_BIT;

			/* map the page 1:1 virtual to physical */
			tlb_entries[entry_idx] = entry;

#ifdef CONFIG_MMU
			arch_mem_map(UINT_TO_POINTER(phys_addr), phys_addr, CONFIG_MM_DRV_PAGE_SIZE,
				     K_MEM_CACHE_WB);
#endif

			/* Invalidate cache to avoid stalled data
			 * all cache data has been flushed before
			 * do this for pages to remap only
			 */
			sys_cache_data_invd_range(UINT_TO_POINTER(phys_addr),
						  CONFIG_MM_DRV_PAGE_SIZE);
		}

		/* save physical address */