Commit e219da1f authored by Tahsin Mutlugun's avatar Tahsin Mutlugun Committed by Benjamin Cabé
Browse files

tests: i2c_ram: rtio: Ensure completion queue events get released



Release completion queue events left over from the previous test and
make sure a completion queue event gets released after it is consumed.
Otherwise newer cqes may be unable to be submitted due to completion
queue being full.

Signed-off-by: default avatarTahsin Mutlugun <Tahsin.Mutlugun@analog.com>
parent c1c31e68
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+38 −20
Original line number Diff line number Diff line
@@ -35,6 +35,10 @@ uint8_t rx_data[7];

const struct device *i2c_dev = DEVICE_DT_GET(I2C_DEV_NODE);

#ifdef CONFIG_I2C_RTIO
static void i2c_ram_rtio_before(void);
#endif

/* Address from datasheet is 0b1010xxxr where x bits are additional
 * memory address bits and r is the r/w i2c bit.
 *
@@ -75,6 +79,10 @@ static void i2c_ram_before(void *f)
	addr += ARRAY_SIZE(tx_data) - TX_DATA_OFFSET;
	memset(rx_data, 0, ARRAY_SIZE(rx_data));

#ifdef CONFIG_I2C_RTIO
	i2c_ram_rtio_before();
#endif

#ifdef CONFIG_PM_DEVICE_RUNTIME
	pm_device_runtime_get(i2c_dev);
#endif
@@ -178,6 +186,26 @@ ZTEST(i2c_ram, test_ram_transfer_cb)
I2C_IODEV_DEFINE(i2c_iodev, I2C_DEV_NODE, RAM_ADDR);
RTIO_DEFINE(i2c_rtio, 2, 2);

static void i2c_ram_rtio_before(void)
{
	struct rtio_cqe *cqe;

	while ((cqe = rtio_cqe_consume(&i2c_rtio))) {
		rtio_cqe_release(&i2c_rtio, cqe);
	}
}

static void check_completion(struct rtio_cqe *cqe, const char *msg)
{
	int32_t result;

	result = cqe->result;
	rtio_cqe_release(&i2c_rtio, cqe);
	if (result) {
		zassert_ok(result, msg);
	}
}

ZTEST(i2c_ram, test_ram_rtio)
{
	struct rtio_sqe *wr_sqe, *rd_sqe;
@@ -190,8 +218,7 @@ ZTEST(i2c_ram, test_ram_rtio)
	zassert_ok(rtio_submit(&i2c_rtio, 1), "submit should succeed");

	wr_cqe = rtio_cqe_consume(&i2c_rtio);
	zassert_ok(wr_cqe->result, "i2c write should succeed");
	rtio_cqe_release(&i2c_rtio, wr_cqe);
	check_completion(wr_cqe, "i2c write should succeed");

	/* Write the address and read the data back */
	msgs[0].len = ARRAY_SIZE(rx_cmd);
@@ -209,11 +236,9 @@ ZTEST(i2c_ram, test_ram_rtio)
	zassert_ok(rtio_submit(&i2c_rtio, 2), "submit should succeed");

	wr_cqe = rtio_cqe_consume(&i2c_rtio);
	check_completion(wr_cqe, "i2c write should succeed");
	rd_cqe = rtio_cqe_consume(&i2c_rtio);
	zassert_ok(wr_cqe->result, "i2c write should succeed");
	zassert_ok(rd_cqe->result, "i2c read should succeed");
	rtio_cqe_release(&i2c_rtio, wr_cqe);
	rtio_cqe_release(&i2c_rtio, rd_cqe);
	check_completion(rd_cqe, "i2c read should succeed");

	zassert_equal(memcmp(&tx_data[TX_DATA_OFFSET], &rx_data[0], ARRAY_SIZE(rx_data)), 0,
		      "Written and Read data should match");
@@ -242,11 +267,9 @@ ZTEST(i2c_ram, test_ram_rtio_write_with_transaction)
	zassert_ok(rtio_submit(&i2c_rtio, 2), "submit should succeed");

	wr_cqe = rtio_cqe_consume(&i2c_rtio);
	zassert_ok(wr_cqe->result, "i2c write should succeed");
	rtio_cqe_release(&i2c_rtio, wr_cqe);
	check_completion(wr_cqe, "i2c write should succeed");
	wr_cqe = rtio_cqe_consume(&i2c_rtio);
	zassert_ok(wr_cqe->result, "i2c write should succeed");
	rtio_cqe_release(&i2c_rtio, wr_cqe);
	check_completion(wr_cqe, "i2c write should succeed");

	/** Now read the register address to confirm the write was performed */
	wr_sqe = rtio_sqe_acquire(&i2c_rtio);
@@ -258,11 +281,9 @@ ZTEST(i2c_ram, test_ram_rtio_write_with_transaction)
	zassert_ok(rtio_submit(&i2c_rtio, 2), "submit should succeed");

	wr_cqe = rtio_cqe_consume(&i2c_rtio);
	check_completion(wr_cqe, "i2c write should succeed");
	rd_cqe = rtio_cqe_consume(&i2c_rtio);
	zassert_ok(wr_cqe->result, "i2c write should succeed");
	zassert_ok(rd_cqe->result, "i2c read should succeed");
	rtio_cqe_release(&i2c_rtio, wr_cqe);
	rtio_cqe_release(&i2c_rtio, rd_cqe);
	check_completion(rd_cqe, "i2c read should succeed");

	zassert_equal(memcmp(&reg_data[0], &rx_data[0], ARRAY_SIZE(reg_data)), 0,
		      "Written and Read data should match");
@@ -296,8 +317,7 @@ void ram_rtio_isr(struct k_timer *tid)
		wr_cqe = rtio_cqe_consume(&i2c_rtio);
		if (wr_cqe) {
			TC_PRINT("timer checking write result, submitting read\n");
			zassert_ok(wr_cqe->result, "i2c write should succeed");
			rtio_cqe_release(&i2c_rtio, wr_cqe);
			check_completion(wr_cqe, "i2c write should succeed");

			/* Write the address and read the data back */
			msgs[0].len = ARRAY_SIZE(rx_cmd);
@@ -322,8 +342,7 @@ void ram_rtio_isr(struct k_timer *tid)
		wr_cqe = rtio_cqe_consume(&i2c_rtio);
		if (wr_cqe) {
			TC_PRINT("read command complete\n");
			zassert_ok(wr_cqe->result, "i2c read command should succeed");
			rtio_cqe_release(&i2c_rtio, wr_cqe);
			check_completion(wr_cqe, "i2c read command should succeed");
			isr_state += 1;
		}
		break;
@@ -331,8 +350,7 @@ void ram_rtio_isr(struct k_timer *tid)
		rd_cqe = rtio_cqe_consume(&i2c_rtio);
		if (rd_cqe) {
			TC_PRINT("read data complete\n");
			zassert_ok(rd_cqe->result, "i2c read data should succeed");
			rtio_cqe_release(&i2c_rtio, rd_cqe);
			check_completion(rd_cqe, "i2c read data should succeed");
			isr_state += 1;
			k_sem_give(&ram_rtio_isr_sem);
			k_timer_stop(tid);