Commit e0ccc37e authored by Alberto Escolar Piedras's avatar Alberto Escolar Piedras Committed by Carles Cufi
Browse files

nrf52_bsim: Provide more CMSIS headers and definitions



Including Exclusive store load and status clear.

Signed-off-by: default avatarAlberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
parent a5883e6f
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+2 −1
Original line number Diff line number Diff line
@@ -29,11 +29,12 @@ zephyr_library_sources(
	main.c
	time_machine.c
	trace_hook.c
	cmsis.c
	cmsis/cmsis.c
	soc/nrfx_coredep.c
)

zephyr_include_directories(soc)
zephyr_include_directories(cmsis)

zephyr_library_include_directories(
  $ENV{BSIM_COMPONENTS_PATH}/libUtilv1/src/
+2 −0
Original line number Diff line number Diff line
@@ -19,6 +19,8 @@ void posix_isr_declare(unsigned int irq_p, int flags, void isr_p(const void *),
		       const void *isr_param_p);
void posix_irq_priority_set(unsigned int irq, unsigned int prio,
			    uint32_t flags);
void nrfbsim_WFE_model(void);
void nrfbsim_SEV_model(void);

/**
 * Configure a static interrupt.
+17 −2
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@
#include "posix_core.h"
#include "posix_board_if.h"
#include "board_soc.h"
#include "bs_tracing.h"

/*
 *  Replacement for ARMs NVIC functions()
@@ -46,8 +47,7 @@ uint32_t NVIC_GetPriority(IRQn_Type IRQn)

void NVIC_SystemReset(void)
{
	posix_print_warning("%s called. Exiting\n", __func__);
	posix_exit(1);
	bs_trace_error_time_line("%s called. Exiting\n", __func__);
}

/*
@@ -72,3 +72,18 @@ void __set_PRIMASK(uint32_t primask)
{
	hw_irq_ctrl_change_lock(primask != 0);
}

void __WFE(void)
{
	nrfbsim_WFE_model();
}

void __WFI(void)
{
	__WFE();
}

void __SEV(void)
{
	nrfbsim_SEV_model();
}
+12 −25
Original line number Diff line number Diff line
@@ -12,40 +12,27 @@
#ifndef BOARDS_POSIX_NRF52_BSIM_CMSIS_H
#define BOARDS_POSIX_NRF52_BSIM_CMSIS_H

#include <stdint.h>
#include "cmsis_instr.h"
#include "nrf52833.h"

#ifdef __cplusplus
extern "C" {
#endif

/* Implement the following ARM intrinsics as no-op:
 * - ARM Data Synchronization Barrier
 * - ARM Data Memory Synchronization Barrier
 * - ARM Instruction Synchronization Barrier
 * - ARM No Operation
 */
#ifndef __DMB
#define __DMB()
#endif

#ifndef __DSB
#define __DSB()
#endif

#ifndef __ISB
#define __ISB()
#endif

#ifndef __NOP
#define __NOP()
#endif

void __enable_irq(void);

void __disable_irq(void);

uint32_t __get_PRIMASK(void);

void __set_PRIMASK(uint32_t primask);

void NVIC_SetPendingIRQ(IRQn_Type IRQn);
void NVIC_ClearPendingIRQ(IRQn_Type IRQn);
void NVIC_DisableIRQ(IRQn_Type IRQn);
void NVIC_EnableIRQ(IRQn_Type IRQn);
void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority);
uint32_t NVIC_GetPriority(IRQn_Type IRQn);
void NVIC_SystemReset(void);

#ifdef __cplusplus
}
#endif
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