Commit dbfbf0ed authored by Anas Nashif's avatar Anas Nashif Committed by Carles Cufi
Browse files

xtensa: adapt soc code to use prep_c 



Many xtensa target jump from soc code directly into cstart and depend on
architecture code being initialized in arch_kernel_init(). Instead of
jumping to cstart, jump to newly introduced prep_c similar to all other
architectures, where common platfotm initialization will happen.

Signed-off-by: default avatarAnas Nashif <anas.nashif@intel.com>
parent 42396735

soc/espressif/esp32/soc.c

+3 −3
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ extern int _ext_ram_bss_start; 
extern int _ext_ram_bss_end;

#endif



extern void z_cstart(void);

extern void z_prep_c(void);

extern void esp_reset_reason_init(void);



#ifdef CONFIG_SOC_ENABLE_APPCPU
@@ -120,7 +120,7 @@ void IRAM_ATTR __esp_platform_start(void) 


	/* Initialize the architecture CPU pointer.  Some of the

	 * initialization code wants a valid _current before

	 * arch_kernel_init() is invoked.

	 * z_prep_c() is invoked.

	 */

	__asm__ __volatile__("wsr.MISC0 %0; rsync" : : "r"(&_kernel.cpus[0]));
@@ -188,7 +188,7 @@ void IRAM_ATTR __esp_platform_start(void) 
	esp_intr_initialize();



	/* Start Zephyr */

	z_cstart();

	z_prep_c();



	CODE_UNREACHABLE;

}

soc/espressif/esp32/soc_appcpu.c

+3 −3
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ 
#include <esp_app_format.h>

#include <zephyr/sys/printk.h>



extern void z_cstart(void);

extern void z_prep_c(void);



/*

 * This is written in C rather than assembly since, during the port bring up,
@@ -69,13 +69,13 @@ void __app_cpu_start(void) 


	/* Initialize the architecture CPU pointer.  Some of the

	 * initialization code wants a valid _current before

	 * arch_kernel_init() is invoked.

	 * z_prep_c() is invoked.

	 */

	__asm__ __volatile__("wsr.MISC0 %0; rsync" : : "r"(&_kernel.cpus[0]));



	esp_intr_initialize();

	/* Start Zephyr */

	z_cstart();

	z_prep_c();



	CODE_UNREACHABLE;

}

soc/espressif/esp32s2/soc.c

+2 −1
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ 


extern void rtc_clk_cpu_freq_set_xtal(void);

extern void esp_reset_reason_init(void);

extern void z_prep_c(void);



#if CONFIG_ESP_SPIRAM

extern int _ext_ram_bss_start;
@@ -143,7 +144,7 @@ void __attribute__((section(".iram1"))) __esp_platform_start(void) 


	esp_intr_initialize();

	/* Start Zephyr */

	z_cstart();

	z_prep_c();



	CODE_UNREACHABLE;

}

soc/espressif/esp32s3/soc.c

+2 −2
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ extern int _ext_ram_bss_start; 
extern int _ext_ram_bss_end;

#endif



extern void z_cstart(void);

extern void z_prep_c(void);

extern void esp_reset_reason_init(void);



#ifdef CONFIG_SOC_ENABLE_APPCPU
@@ -212,7 +212,7 @@ void IRAM_ATTR __esp_platform_start(void) 
	esp_intr_initialize();



	/* Start Zephyr */

	z_cstart();

	z_prep_c();



	CODE_UNREACHABLE;

}

soc/espressif/esp32s3/soc_appcpu.c

+2 −2
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ 
#include <esp_app_format.h>

#include <esp_clk_internal.h>



extern void z_cstart(void);

extern void z_prep_c(void);



static void core_intr_matrix_clear(void)

{
@@ -72,7 +72,7 @@ void IRAM_ATTR __app_cpu_start(void) 
	esp_intr_initialize();



	/* Start Zephyr */

	z_cstart();

	z_prep_c();



	CODE_UNREACHABLE;

}

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