Commit d7a947a8 authored by Daniel DeGrasse's avatar Daniel DeGrasse Committed by Christopher Friedt
Browse files

boards: mimxrt1064_evk: Added SPI support for RT1064 



SPI support is available on LPSPI1 and LPSPI3. Both of these require
board modifications to expose headers. LPSPI1 is used for testing, and
requires that the board have solder jumpers R278, R279, R280, and R281
bridged.

Signed-off-by: default avatarDaniel DeGrasse <daniel.degrasse@nxp.com>
parent 4c81289a

boards/arm/mimxrt1064_evk/doc/index.rst

+17 −5
Original line number Diff line number Diff line
@@ -120,6 +120,8 @@ features: 
+-----------+------------+-------------------------------------+

| CAN       | on-chip    | can                                 |

+-----------+------------+-------------------------------------+

| SPI       | on-chip    | spi                                 |

+-----------+------------+-------------------------------------+

| DMA       | on-chip    | dma                                 |

+-----------+------------+-------------------------------------+

| HWINFO    | on-chip    | Unique device serial number         |
@@ -139,7 +141,13 @@ The MIMXRT1064 SoC has four pairs of pinmux/gpio controllers. 
+---------------+-----------------+---------------------------+

| Name          | Function        | Usage                     |

+===============+=================+===========================+

| GPIO_AD_B0_02 | LCD_RST         | LCD Display               |

| GPIO_AD_B0_00 | LPSPI1_SCK      | SPI                       |

+---------------+-----------------+---------------------------+

| GPIO_AD_B0_01 | LPSPI1_SDO      | SPI                       |

+---------------+-----------------+---------------------------+

| GPIO_AD_B0_02 | LPSPI3_SDI/LCD_RST| SPI/LCD Display         |

+---------------+-----------------+---------------------------+

| GPIO_AD_B0_03 | LPSPI3_PCS0     | SPI                       |

+---------------+-----------------+---------------------------+

| GPIO_AD_B0_05 | GPIO            | SD Card                   |

+---------------+-----------------+---------------------------+
@@ -229,13 +237,13 @@ The MIMXRT1064 SoC has four pairs of pinmux/gpio controllers. 
+---------------+-----------------+---------------------------+

| GPIO_AD_B0_10 | ENET_INT        | Ethernet                  |

+---------------+-----------------+---------------------------+

| GPIO_SD_B0_00 | USDHC1_CMD      | SD Card                   |

| GPIO_SD_B0_00 | USDHC1_CMD/LPSPI1_SCK | SD Card/SPI         |

+---------------+-----------------+---------------------------+

| GPIO_SD_B0_01 | USDHC1_CLK      | SD Card                   |

| GPIO_SD_B0_01 | USDHC1_CLK/LPSPI1_PCS0 | SD Card/SPI        |

+---------------+-----------------+---------------------------+

| GPIO_SD_B0_02 | USDHC1_DATA0    | SD Card                   |

| GPIO_SD_B0_02 | USDHC1_DATA0/LPSPI1_SDO | SD Card/SPI       |

+---------------+-----------------+---------------------------+

| GPIO_SD_B0_03 | USDHC1_DATA1    | SD Card                   |

| GPIO_SD_B0_03 | USDHC1_DATA1/LPSPI1_SDI | SD Card/SPI       |

+---------------+-----------------+---------------------------+

| GPIO_SD_B0_04 | USDHC1_DATA2    | SD Card                   |

+---------------+-----------------+---------------------------+
@@ -256,6 +264,10 @@ The MIMXRT1064 SoC has four pairs of pinmux/gpio controllers. 
| GPIO_SD_B1_11 | FLEXSPIA_DATA03 | QSPI Flash                |

+---------------+-----------------+---------------------------+



.. note::

        In order to use the SPI peripheral on this board, resistors R278, R279,

        R280 and R281 must be populated with zero ohm resistors



System Clock

============

boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts

+8 −0
Original line number Diff line number Diff line
@@ -247,3 +247,11 @@ zephyr_udc0: &usb1 { 
&wdog0 {

	status = "okay";

};



&lpspi1 {

	status = "okay";

};



&lpspi3 {

	status = "okay";

};

boards/arm/mimxrt1064_evk/mimxrt1064_evk.yaml

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ supported: 
  - netif:eth

  - pwm

  - sdhc

  - spi

  - usb_device

  - video

  - kscan:touch

boards/arm/mimxrt1064_evk/pinmux.c

+62 −0
Original line number Diff line number Diff line
@@ -335,6 +335,68 @@ static int mimxrt1064_evk_init(const struct device *dev) 
	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0x10F1U);

#endif



#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpspi1), okay) && CONFIG_SPI

#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC

	#error "SPI and SDMMC pins conflict on this board." \

		"Please disable one via KConfig or device tree"

#else

	/* LPSPI1 SCK, SDO, SDI, PCS0 */

	/* Expose these pins by connecting R278, R279, R280, and R281 on evk board */

	IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK, 0);

	IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0, 0);

	IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO, 0);

	IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI, 0);



	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK,

			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |

			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |

			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));



	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0,

			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |

			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |

			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));



	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO,

			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |

			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |

			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));



	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI,

			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |

			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |

			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));

#endif

#endif



#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpspi3), okay) && CONFIG_SPI

	/* LPSPI3 SCK, SDO, SDI, PCS0 */

	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK, 0U);

	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO, 0U);

	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_LPSPI3_SDI, 0U);

	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_03_LPSPI3_PCS0, 0U);



	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_00_LPSPI3_SCK,

			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |

			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |

			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));



	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_01_LPSPI3_SDO,

			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |

			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |

			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));



	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_LPSPI3_SDI,

			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |

			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |

			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));



	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_LPSPI3_PCS0,

			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |

			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |

			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));

#endif



	return 0;

}

tests/drivers/spi/spi_loopback/boards/mimxrt1064_evk.conf

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+7 −0
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#

# Copyright (c) 2021, NXP

#

# SPDX-License-Identifier: Apache-2.0

#



CONFIG_SPI_LOOPBACK_DRV_NAME="SPI_1"

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