Commit d1f3f863 authored by Yong Cong Sin's avatar Yong Cong Sin Committed by Anas Nashif
Browse files

soc/xtensa/intel_adsp: fix interrupts typo 

Hex should be `0x` instead of `0X`

Signed-off-by: default avatarYong Cong Sin <ycsin@meta.com>
parent d053b8bf

dts/xtensa/intel/intel_adsp_cavs18.dtsi

+1 −1
Changes for dts/xtensa/intel/intel_adsp_cavs18.dtsi: 1 added line, 1 removed line.
Original line number Diff line number Diff line
@@ -140,7 +140,7 @@ 
			reg = <0x78820 0x10>;

			interrupt-controller;

			#interrupt-cells = <3>;

			interrupts = <0XD 0 0>;

			interrupts = <0xD 0 0>;

			interrupt-parent = <&core_intc>;

		};

CRA Git | Maintained and supported by SUSTech CRA and CCSE