Commit d1d42ec7 authored by Quy Tran's avatar Quy Tran Committed by Anas Nashif
Browse files

dts: bindings: clock: Change clock control binding for Renesas RA

Background of this modification is to make clock control
driver code provided by Renesas vendor to support for Renesas MCU
on Zephyr.

Signed-off-by: default avatarQuy Tran <quy.tran.pz@renesas.com>
parent 2bafb837
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+2 −0
Changes for boards/renesas/ek_ra4e2/doc/index.rst: 2 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -96,6 +96,8 @@ The below features are currently supported on Zephyr OS for EK-RA4E2 board:
+-----------+------------+----------------------+
| UART      | on-chip    | serial               |
+-----------+------------+----------------------+
| CLOCK     | on-chip    | clock control        |
+-----------+------------+----------------------+

Other hardware features are currently not supported by the port.

+0 −1
Changes for boards/renesas/ek_ra4e2/ek_ra4e2.dts: 0 added lines, 1 removed line.
Original line number Diff line number Diff line
@@ -56,7 +56,6 @@
	source = <RA_PLL_SOURCE_MAIN_OSC>;
	div = <RA_PLL_DIV_1>;
	mul = <10 0>;
	freq = <DT_FREQ_M(200)>;
	status = "okay";
};

+1 −0
Changes for boards/renesas/ek_ra4e2/ek_ra4e2_defconfig: 1 added line, 0 removed lines.
Original line number Diff line number Diff line
@@ -15,3 +15,4 @@ CONFIG_CONSOLE=y

CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_BUILD_NO_GAP_FILL=y
CONFIG_CLOCK_CONTROL=y
+2 −0
Changes for boards/renesas/ek_ra4m2/doc/index.rst: 2 added lines, 0 removed lines.
Original line number Diff line number Diff line
@@ -96,6 +96,8 @@ The below features are currently supported on Zephyr OS for EK-RA4M2 board:
+-----------+------------+----------------------+
| UART      | on-chip    | serial               |
+-----------+------------+----------------------+
| CLOCK     | on-chip    | clock control        |
+-----------+------------+----------------------+

Other hardware features are currently not supported by the port.

+0 −1
Changes for boards/renesas/ek_ra4m2/ek_ra4m2.dts: 0 added lines, 1 removed line.
Original line number Diff line number Diff line
@@ -56,7 +56,6 @@
	source = <RA_PLL_SOURCE_MAIN_OSC>;
	div = <RA_PLL_DIV_3>;
	mul = <25 0>;
	freq = <DT_FREQ_M(200)>;
	status = "okay";
};

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