Commit d1c6bb5c authored by Chekhov Ma's avatar Chekhov Ma Committed by Fabio Baltieri
Browse files

imx8m: auto generate mmu_regions array from dt compatiable 



Adopt the "MMU_REGION_DT_FLAT_ENTRY" macro to automatically generate
elements in "mmu_regions" according to devicetree "compatible" and
"status".

Signed-off-by: default avatarChekhov Ma <chekhov.ma@nxp.com>
parent 81c5a093

soc/arm64/nxp_imx/mimx8m/mmu_regions.c

+3 −10
Original line number Diff line number Diff line
@@ -25,25 +25,18 @@ static const struct arm_mmu_region mmu_regions[] = { 
			      DT_REG_SIZE(DT_NODELABEL(ccm)),

			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),



	MMU_REGION_FLAT_ENTRY("UART2",

			      DT_REG_ADDR(DT_NODELABEL(uart2)),

			      DT_REG_SIZE(DT_NODELABEL(uart2)),

			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),



	MMU_REGION_FLAT_ENTRY("ANA_PLL",

			      DT_REG_ADDR(DT_NODELABEL(ana_pll)),

			      DT_REG_SIZE(DT_NODELABEL(ana_pll)),

			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),



	MMU_REGION_FLAT_ENTRY("UART4",

			      DT_REG_ADDR(DT_NODELABEL(uart4)),

			      DT_REG_SIZE(DT_NODELABEL(uart4)),

			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),



	MMU_REGION_FLAT_ENTRY("IOMUXC",

			      DT_REG_ADDR(DT_NODELABEL(iomuxc)),

			      DT_REG_SIZE(DT_NODELABEL(iomuxc)),

			      MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS),



	MMU_REGION_DT_COMPAT_FOREACH_FLAT_ENTRY(nxp_imx_iuart,

				  (MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_NS))

};



const struct arm_mmu_config mmu_config = {

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