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Commit ce57c2f3 authored by Ayush Singh's avatar Ayush Singh Committed by Benjamin Cabé
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soc: ti: mspm0: mspm0l: Selectively enable MPU 



- Not all MSPM0L series socs seem to have MPU. After a glance at the TI
  website for features, only MSPM0L222x class socs seem to have MPU.

Signed-off-by: default avatarAyush Singh <ayush@beagleboard.org>
parent 7436b9dd
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