Commit cdd58561 authored by Erwan Gouriou's avatar Erwan Gouriou Committed by Kumar Gala
Browse files

driver/gpio: stm32: Add STM32L5 support 



Add basic GPIO support. Regarding interface with EXTI,
STM32L5 is similar to STM32G0.

Signed-off-by: default avatarErwan Gouriou <erwan.gouriou@linaro.org>
parent 1f054a7b

drivers/gpio/gpio_stm32.c

+6 −3
Original line number Diff line number Diff line
@@ -212,7 +212,8 @@ static inline uint32_t gpio_stm32_pin_to_exti_line(int pin) 
	return ((pin % 4 * 4) << 16) | (pin / 4);

#elif defined(CONFIG_SOC_SERIES_STM32MP1X)

	return (((pin * 8) % 32) << 16) | (pin / 4);

#elif defined(CONFIG_SOC_SERIES_STM32G0X)

#elif defined(CONFIG_SOC_SERIES_STM32G0X) || \

	defined(CONFIG_SOC_SERIES_STM32L5X)

	return ((pin & 0x3) << (16 + 3)) | (pin >> 2);

#else

	return (0xF << ((pin % 4 * 4) + 16)) | (pin / 4);
@@ -238,7 +239,8 @@ static void gpio_stm32_set_exti_source(int port, int pin) 
	LL_GPIO_AF_SetEXTISource(port, line);

#elif CONFIG_SOC_SERIES_STM32MP1X

	LL_EXTI_SetEXTISource(port, line);

#elif defined(CONFIG_SOC_SERIES_STM32G0X)

#elif defined(CONFIG_SOC_SERIES_STM32G0X) || \

	defined(CONFIG_SOC_SERIES_STM32L5X)

	LL_EXTI_SetEXTISource(port, line);

#else

	LL_SYSCFG_SetEXTISource(port, line);
@@ -254,7 +256,8 @@ static int gpio_stm32_get_exti_source(int pin) 
	port = LL_GPIO_AF_GetEXTISource(line);

#elif CONFIG_SOC_SERIES_STM32MP1X

	port = LL_EXTI_GetEXTISource(line);

#elif defined(CONFIG_SOC_SERIES_STM32G0X)

#elif defined(CONFIG_SOC_SERIES_STM32G0X) || \

	defined(CONFIG_SOC_SERIES_STM32L5X)

	port = LL_EXTI_GetEXTISource(line);

#else

	port = LL_SYSCFG_GetEXTISource(line);

drivers/gpio/gpio_stm32.h

+10 −0
Original line number Diff line number Diff line
@@ -132,6 +132,16 @@ 
#define STM32_PERIPH_GPIOG LL_AHB2_GRP1_PERIPH_GPIOG

#define STM32_PERIPH_GPIOH LL_AHB2_GRP1_PERIPH_GPIOH

#define STM32_PERIPH_GPIOI LL_AHB2_GRP1_PERIPH_GPIOI

#elif CONFIG_SOC_SERIES_STM32L5X

#define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB2

#define STM32_PERIPH_GPIOA LL_AHB2_GRP1_PERIPH_GPIOA

#define STM32_PERIPH_GPIOB LL_AHB2_GRP1_PERIPH_GPIOB

#define STM32_PERIPH_GPIOC LL_AHB2_GRP1_PERIPH_GPIOC

#define STM32_PERIPH_GPIOD LL_AHB2_GRP1_PERIPH_GPIOD

#define STM32_PERIPH_GPIOE LL_AHB2_GRP1_PERIPH_GPIOE

#define STM32_PERIPH_GPIOF LL_AHB2_GRP1_PERIPH_GPIOF

#define STM32_PERIPH_GPIOG LL_AHB2_GRP1_PERIPH_GPIOG

#define STM32_PERIPH_GPIOH LL_AHB2_GRP1_PERIPH_GPIOH

#elif CONFIG_SOC_SERIES_STM32MP1X

#define STM32_CLOCK_BUS_GPIO STM32_CLOCK_BUS_AHB4

#define STM32_PERIPH_GPIOA LL_AHB4_GRP1_PERIPH_GPIOA

dts/arm/st/l5/stm32l5.dtsi

+81 −0
Original line number Diff line number Diff line
@@ -7,6 +7,8 @@ 


#include <arm/armv8-m.dtsi>

#include <dt-bindings/clock/stm32_clock.h>

#include <dt-bindings/gpio/gpio.h>





/ {

	cpus {
@@ -55,6 +57,85 @@ 
			reg = <0x40021000 0x400>;

			label = "STM32_CLK_RCC";

		};



		pinctrl: pin-controller@42020000 {

			compatible = "st,stm32-pinmux";

			#address-cells = <1>;

			#size-cells = <1>;

			reg = <0x42020000 0x2000>;



			gpioa: gpio@42020000 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x42020000 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000001>;

				label = "GPIOA";

			};



			gpiob: gpio@42020400 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x42020400 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000002>;

				label = "GPIOB";

			};



			gpioc: gpio@42020800 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x42020800 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000004>;

				label = "GPIOC";

			};



			gpiod: gpio@42020c00 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x42020c00 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>;

				label = "GPIOD";

			};



			gpioe: gpio@42021000 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x42021000 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>;

				label = "GPIOE";

			};



			gpiof: gpio@42021400 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x42021400 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000020>;

				label = "GPIOF";

			};



			gpiog: gpio@42021800 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x42021800 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000040>;

				label = "GPIOG";

			};



			gpioh: gpio@42021c00 {

				compatible = "st,stm32-gpio";

				gpio-controller;

				#gpio-cells = <2>;

				reg = <0x42021c00 0x400>;

				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000080>;

				label = "GPIOH";

			};

		};

	};

};

soc/arm/st_stm32/stm32l5/soc.h

+4 −0
Original line number Diff line number Diff line
@@ -39,6 +39,10 @@ 
#include <stm32l5xx_ll_exti.h>

#endif



#ifdef CONFIG_GPIO_STM32

#include <stm32l5xx_ll_gpio.h>

#endif



#endif /* !_ASMLANGUAGE */



#endif /* _STM32L5_SOC_H_ */

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