soc: xlnx: zynq7000: add FPU support

	  fused multiply-accumulate) and floating-point exception trapping with 16

	  double-word registers.

config VFP_DP_D32_FMAC

	bool

	select CPU_HAS_VFP

	select VFP_FEATURE_SINGLE_PRECISION

	select VFP_FEATURE_DOUBLE_PRECISION

	select VFP_FEATURE_FMAC

	select VFP_FEATURE_REGS_S64_D32

	help

	  This option signifies the use of a VFP floating-point coprocessor

	  that supports single- and double-precision operations

	  (including fused multiply-accumulate) with 32 double-word registers.

config VFP_DP_D32_FP16_FMAC

	bool

	select CPU_HAS_VFP

  elseif(CONFIG_CPU_AARCH32_CORTEX_A)

    if(CONFIG_CPU_CORTEX_A7)

      set(GCC_M_FPU vfpv4-d16)

    elseif(CONFIG_CPU_CORTEX_A9)

      set(GCC_M_FPU vfpv3)

      if(NOT CONFIG_VFP_FEATURE_REGS_S64_D32)

        set(GCC_M_FPU ${GCC_M_FPU}-d16)

      endif()

      if(CONFIG_VFP_FEATURE_HALF_PRECISION)

        set(GCC_M_FPU ${GCC_M_FPU}-fp16)

      endif()

    endif()

  endif()

endif()

	select CPU_CORTEX_A9

	select SYSCON

	select ARM_ARCH_TIMER_ERRATUM_740657 if ARM_ARCH_TIMER

	select VFP_DP_D32_FMAC

	select CPU_CORTEX_A9

	select SYSCON

	select ARM_ARCH_TIMER_ERRATUM_740657 if ARM_ARCH_TIMER

	select VFP_DP_D32_FMAC