Commit cb583995 authored by Marcio Ribeiro's avatar Marcio Ribeiro Committed by Anas Nashif
Browse files

arch: riscv: imply XIP config pushed to SoC level 



'imply XIP' pushed from arch/Kconfig/'config RISCV' to riscv SoCs Kconfig
files to allow riscv SoCs having XIP enabled (or not) at SoC level

Signed-off-by: default avatarMarcio Ribeiro <marcio.ribeiro@espressif.com>
parent 41cc12c7

arch/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -122,7 +122,6 @@ config RISCV 
	select ARCH_HAS_DIRECTED_IPIS

	select BARRIER_OPERATIONS_BUILTIN

	select ARCH_HAS_THREAD_PRIV_STACK_SPACE_GET if USERSPACE

	imply XIP

	help

	  RISCV architecture

soc/andestech/ae350/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ config SOC_SERIES_ANDES_AE350 
	select RISCV

	select RISCV_PRIVILEGED

	select RISCV_HAS_PLIC

	imply XIP



config SOC_ANDES_AE350

	select ATOMIC_OPERATIONS_BUILTIN

soc/efinix/sapphire/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -12,3 +12,4 @@ config SOC_EFINIX_SAPPHIRE 
	select RISCV

	select RISCV_PRIVILEGED

	select RISCV_HAS_PLIC

	imply XIP

soc/intel/intel_niosv/niosv/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ config SOC_SERIES_NIOSV 
	select RISCV_ISA_EXT_A

	select RISCV_ISA_EXT_ZICSR

	select RISCV_ISA_EXT_ZIFENCEI

	imply XIP



config SOC_NIOSV_M

	help

soc/ite/ec/it8xxx2/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ config SOC_IT8XXX2 
	select RISCV_ISA_EXT_M if !(SOC_IT81302BX || SOC_IT81202BX)

	select RISCV_ISA_EXT_A

	select RISCV_ISA_EXT_C

	imply XIP



config SOC_IT8XXX2_REG_SET_V1

	bool

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