boards: arm: nucleo_h7a3zi_q: increase the CPU frequency

The STM32H7A3 SoC supports a CPU clock up to 280 MHz for VOS0. The AHB
bus is also limited to 280 MHz, while the APB buses are limited to
140 MHz.

This patch updates the PLL configuration to change the CPU frequency to
280 MHz, while tkaing into account the above constraints.

The Q output divisor is adjusted to keep a frequency in the same range,
in practice increased from 48 to 56 MHz. It is currently only used by
the SPI so that should not be an issue, especially given the SPI
interface can use much higher frequencies.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>