samples: dsa: add imx943_evk A55 CPU Core support (c7578b00) · Commits · Wenxi XU / zephyr

boards/nxp/imx943_evk/doc/index.rst

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		@@ -69,12 +69,27 @@ NETC driver supports to manage the Physical Station Interface (PSI), and TSN swi
		The ENET0, ENETC1, ENETC2 ports could be enabled for M33 by west build option
		``-DEXTRA_DTC_OVERLAY_FILE=enetc.overlay``.

		The two switch ports could be verified via :zephyr:code-sample:`dsa`.

		For A55 Core, ENET0, ENETC1, ENETC2 ports are enabled by default, so no overlay is
		needed, but NETC depends on GIC ITS, so need to make sure to allocate heap memory to
		be larger than 851968 byes by setting CONFIG_HEAP_MEM_POOL_SIZE.

		The two switch ports could be verified via :zephyr:code-sample:`dsa` on M33 core
		or on A55 Core, for example for A55 Core:

		.. zephyr-app-commands::
		:zephyr-app: samples/net/dsa
		:host-os: unix
		:board: imx943_evk/mimx94398/a55
		:goals: flash

		Or for M33 Core:

		.. zephyr-app-commands::
		:zephyr-app: samples/net/dsa
		:host-os: unix
		:board: imx943_evk/mimx94398/m33/ddr
		:goals: build

		Programming and Debugging (A55)
		*******************************

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		CONFIG_NET_SAMPLE_DSA_LLDP=n
		CONFIG_HEAP_MEM_POOL_SIZE=851968

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		/*
		* Copyright 2025 NXP
		*
		* SPDX-License-Identifier: Apache-2.0
		*/

		&emdio {
		status = "okay";

		phy0: phy@2 {
		status = "okay";
		};

		phy1: phy@3 {
		status = "okay";
		};
		};

		/* Internal port */
		&enetc_psi3 {
		status = "okay";
		};

		&netc_switch {
		status = "okay";

		switch_port0: switch_port@0 {
		status = "okay";
		};

		switch_port1: switch_port@1 {
		status = "okay";
		};

		/* Internal port */
		switch_port3: switch_port@3 {
		status = "okay";
		};
		};

+1 −0