Commit c5818d4b authored by Naga Sureshkumar Relli's avatar Naga Sureshkumar Relli Committed by Chris Friedt
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dts: riscv: introduce Polarfire SOC SPI interface 



Add support for the Microchip Polarfire SOC SPI interface.

Signed-off-by: default avatarNaga Sureshkumar Relli <nagasuresh.relli@microchip.com>
parent 19700040

dts/bindings/spi/microchip,mpfs-spi.yaml

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# Copyright (c) 2022 Microchip Inc.

# SPDX-License-Identifier: Apache-2.0



description: Microchip Polarfire SOC SPI IP node



compatible: "microchip,mpfs-spi"



include: spi-controller.yaml



properties:

  reg:

    required: true



  interrupts:

    required: true

dts/riscv/microchip/mpfs.dtsi

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@@ -195,6 +195,17 @@ 
			clock-frequency = <150000000>;

		};



		spi1: spi@20109000 {

			compatible = "microchip,mpfs-spi";

			#address-cells = <1>;

			#size-cells = <0>;

			reg = <0x20109000 0x1000>;

			interrupt-parent = <&plic>;

			interrupts = <55 1>;

			status = "disabled";

			clock-frequency = <150000000>;

		};



		gpio0: gpio@20120000 {

			compatible = "microchip,mpfs-gpio";

			reg = <0x20120000 0x1000>;

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