arch: arm: core: cortex_m: add a barrier before the dummy FP instruction (bb55155d) · Commits · Wenxi XU / zephyr

On Cortex-M7 CPU (at least on STM32F723), the dummy move FPU instruction is executed before the FPU lazy state preservation is disabled. Add an instruction synchronization barrier before it to avoid that. At the same time, remove the data synchronization barrier after the dummy move as it does not have any effect on RAM or registers. Signed-off-by:

Aurelien Jarno <aurelien@aurel32.net>

arch/arm/core/cortex_m/prep_c.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -79,11 +79,13 @@ static inline void enable_floating_point(void)
		* does not automatically save the volatile FP registers until they
		* have first been touched. Perform a dummy move operation so that
		* the stack frames are created as expected before any thread
		* context switching can occur.
		* context switching can occur. It has to be surrounded by instruction
		* synchronisation barriers to ensure that the whole sequence is
		* serialized.
		*/
		__asm__ volatile(
		"isb;\n\t"
		"vmov s0, s0;\n\t"
		"dsb;\n\t"
		"isb;\n\t"
		);
		}

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