boards: nxp: imx943_evk: enable m70 and m71 (b50b091e) · Commits · Wenxi XU / zephyr

boards/nxp/imx943_evk/Kconfig.imx943_evk

+2 −0

Original line number	Diff line number	Diff line
		@@ -4,4 +4,6 @@
		config BOARD_IMX943_EVK
		select SOC_MIMX94398_A55 if BOARD_IMX943_EVK_MIMX94398_A55
		select SOC_MIMX94398_M33 if BOARD_IMX943_EVK_MIMX94398_M33 \|\| BOARD_IMX943_EVK_MIMX94398_M33_DDR
		select SOC_MIMX94398_M7_0 if BOARD_IMX943_EVK_MIMX94398_M7_0
		select SOC_MIMX94398_M7_1 if BOARD_IMX943_EVK_MIMX94398_M7_1
		select SOC_PART_NUMBER_MIMX94398AVKM

boards/nxp/imx943_evk/doc/index.rst

+49 −5

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		@@ -10,7 +10,7 @@ cores for functional safety. With PLCs, I/O controllers, V2X accelerators,
		ML acceleration, energy management, and advanced security, the i.MX 943
		processor provides optimized performance and power efficiency for industrial,
		IoT, and automotive devices. The i.MX943 device on the board comes in a
		compact 19 x 19 mm package.
		compact 19 x 19 mm/15 x 15 mm package.

		Hardware
		********
		@@ -204,8 +204,8 @@ Then the following log could be found on UART1 console:
		.. include:: ../../common/board-footer.rst
		:start-after: nxp-board-footer

		Programming and Debugging (M33)
		*******************************
		Programming and Debugging (M33 in NETC MIX, M7_0 in M7MIX0, M7_1 in M7MIX1)
		***************************************************************************

		Step 1. Build Zephyr application
		================================
		@@ -219,6 +219,16 @@ For TCM target
		:board: imx943_evk/mimx94398/m33
		:goals: build

		.. zephyr-app-commands::
		:zephyr-app: samples/hello_world
		:board: imx943_evk/mimx94398/m7_0
		:goals: build

		.. zephyr-app-commands::
		:zephyr-app: samples/hello_world
		:board: imx943_evk/mimx94398/m7_1
		:goals: build

		For DDR target

		.. zephyr-app-commands::
		@@ -269,11 +279,14 @@ Below is an operations example on Linux host. (For more detail, refer to
		cp firmware-ele-imx-2.0.1-0a66c34/mx943a0-ahab-container.img imx-mkimage/iMX94/
		cp imx-sm/build/mx94alt/m33_image.bin imx-mkimage/iMX94/
		cp imx-oei/build/mx943lp5-19/ddr/oei-m33-ddr.bin imx-mkimage/iMX94/
		cp zephyr/build/zephyr/zephyr.bin imx-mkimage/iMX94/m33s_image.bin
		cp zephyr/build/zephyr/zephyr.bin imx-mkimage/iMX94/m33s_image.bin (m70_image.bin or m71_image.bin)

		cd imx-mkimage
		make SOC=iMX94 OEI=YES flash_m33s # for TCM target
		make SOC=iMX94 OEI=YES flash_m33s_ddr # for DDR target
		or
		make SOC=iMX94 OEI=YES flash_m33s_m70_m71 # for TCM target


		# Program to SD card

		@@ -343,6 +356,17 @@ For TCM target
		* Booting Zephyr OS build v4.1.0-5264-g8654b4029d16 *
		Hello World! imx943_evk/mimx94398/m33


		.. code-block:: console

		* Booting Zephyr OS build v4.2.0-803-g5537e8d9b3f1 *
		Hello World! imx943_evk/mimx94398/m7_0

		.. code-block:: console

		* Booting Zephyr OS build v4.2.0-803-g2f145e66dce2 *
		Hello World! imx943_evk/mimx94398/m7_1

		For DDR target

		.. code-block:: console
		@@ -350,7 +374,27 @@ For DDR target
		* Booting Zephyr OS build v4.1.0-5264-g8654b4029d16 *
		Hello World! imx943_evk/mimx94398/m33/ddr

		Note: there will be 4 serial ports identified when connect USB cable to debug port.
		Note:

		a. Please connect two additional usb2serial converter between Host PC and board's
		auduino interface with dupont cable for M70 in M70 MIX and M71 in M71 MIX.
		Connection as below,

		.. code-block:: text

		+---------+ USB +-----------------+ +---------+
		\| Host PC \|<----->\| USB-to-Serial a \|--TX-->RX(J48-2, M2_UART11_RXD)--\| board \|
		\| \| \| \|--RX<--TX(J48-4, M2_UART11_TXD)--\| \|
		\| \| \| \|--GND----------------GND(J47-14)-\| \|
		\| \| +-----------------+ \| \|
		\| \| \| \|
		\| \| USB +-----------------+ \| \|
		\| \|<----->\| USB to Serial b \|--TX-->RX(J44-2, M1_UART12_RXD)--\| \|
		\| \| \| \|--RX<--TX(j44-4, M1_UART12_TXD)--\| \|
		\| \| \| \|--GND----------------GND(J43-14)-\| \|
		+---------+ +-----------------+ +---------+

		b. There will be 4 serial ports identified when connect USB cable to debug port.
		The first serial port will be UART8 for M33. As there is multiplexing between JTAG
		and UART8, below bcu (`bcu 1.1.113 download`_) configuration is needed to use UART8.

boards/nxp/imx943_evk/imx943_evk-pinctrl.dtsi

+20 −0

Original line number	Diff line number	Diff line
		@@ -151,6 +151,26 @@
		drive-strength = "x4";
		};
		};

		lpuart11_default: lpuart11_default {
		group0 {
		pinmux = <&iomuxc_gpio_io25_lpuart_rx_lpuart11_rx>,
		<&iomuxc_gpio_io24_lpuart_tx_lpuart11_tx>;
		bias-pull-up;
		slew-rate = "slightly_fast";
		drive-strength = "x4";
		};
		};

		lpuart12_default: lpuart12_default {
		group0 {
		pinmux = <&iomuxc_gpio_io27_lpuart_rx_lpuart12_rx>,
		<&iomuxc_gpio_io26_lpuart_tx_lpuart12_tx>;
		bias-pull-up;
		slew-rate = "slightly_fast";
		drive-strength = "x4";
		};
		};
		};

		&eth2_default_group1 {

boards/nxp/imx943_evk/imx943_evk_mimx94398_cm.dtsi

0 → 100644

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		/*
		* Copyright 2025 NXP
		*
		* SPDX-License-Identifier: Apache-2.0
		*/

		/dts-v1/;

		&emdio {
		pinctrl-0 = <&emdio_default>;
		pinctrl-names = "default";
		status = "disabled";

		phy0: phy@f {
		compatible = "ethernet-phy";
		reg = <0xf>;
		status = "disabled";
		};

		phy1: phy@10 {
		compatible = "ethernet-phy";
		reg = <0x10>;
		status = "disabled";
		};

		phy2: phy@5 {
		compatible = "realtek,rtl8211f";
		reg = <0x5>;
		status = "disabled";
		};

		phy3: phy@6 {
		compatible = "realtek,rtl8211f";
		reg = <0x6>;
		status = "disabled";
		};

		phy4: phy@7 {
		compatible = "realtek,rtl8211f";
		reg = <0x7>;
		status = "disabled";
		};
		};

		&enetc_psi0 {
		pinctrl-0 = <&eth2_default>;
		pinctrl-names = "default";
		phy-handle = <&phy2>;
		phy-connection-type = "rgmii";
		status = "disabled";
		};

		&enetc_psi1 {
		pinctrl-0 = <&eth3_default>;
		pinctrl-names = "default";
		phy-handle = <&phy3>;
		phy-connection-type = "rgmii";
		status = "disabled";
		};

		&enetc_psi2 {
		pinctrl-0 = <&eth4_default>;
		pinctrl-names = "default";
		phy-handle = <&phy4>;
		phy-connection-type = "rgmii";
		status = "disabled";
		};

boards/nxp/imx943_evk/imx943_evk_mimx94398_m7_0.dts

0 → 100644

+47 −0

Original line number	Diff line number	Diff line
		/*
		* Copyright 2025 NXP
		*
		* SPDX-License-Identifier: Apache-2.0
		*/

		/dts-v1/;

		#include <nxp/nxp_imx943_m7_0.dtsi>
		#include "imx943_evk-pinctrl.dtsi"

		/ {
		model = "NXP i.MX943 EVK board";
		compatible = "nxp,imx943_evk";

		chosen {
		/* TCM */
		zephyr,flash = &itcm;
		zephyr,sram = &dtcm;

		zephyr,console = &lpuart11;
		zephyr,shell-uart = &lpuart11;
		};
		};

		&flexio1 {
		status = "okay";
		/* Signal can be checked by the connector J44 Pin10(M1_LED_TP1) via logic analyzer */
		flexio1_pwm: flexio1_pwm {
		compatible = "nxp,flexio-pwm";
		#pwm-cells = <3>;
		pinctrl-0 = <&flexio1_io5_default>;
		pinctrl-names = "default";
		pwm_1 {
		pin-id = <5>;
		prescaler = <1>;
		};
		status = "okay";
		};
		};

		&lpuart11 {
		status = "okay";
		current-speed = <115200>;
		pinctrl-0 = <&lpuart11_default>;
		pinctrl-names = "default";
		};

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