Commit b4fb833e authored by Andy Ross's avatar Andy Ross Committed by Benjamin Cabé
Browse files

soc/mediatek/adsp: Source timer rate from DTS



These devices have an architecturally fixed 13 MHz clock device.  But
thankfully you can put a default into a DTS binding so we don't have
to repeat it for all of them.

Signed-off-by: default avatarAndy Ross <andyross@google.com>
parent 09495c9e
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# Copyright 2024 The ChromiumOS Authors
# SPDX-License-Identifier: Apache-2.0

include: base.yaml

# This clock hardware is almost fully described by its register block,
# but needs a binding for the frequency property below (which is
# architecturally fixed at 13 MHz on all known devices)

description: MediaTek Audio DSP Core Clock
compatible: "mediatek,ostimer64"
properties:
  freq-hz:
    type: int
    default: 13000000
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@@ -37,7 +37,7 @@ config XTENSA_TIMER
	default n

config SYS_CLOCK_HW_CYCLES_PER_SEC
	default 13000000
	default $(dt_node_int_prop_int,$(dt_nodelabel_path,ostimer64),freq-hz)

config MAIN_STACK_SIZE
	default 2048