Commit ab9f95e9 authored by Daniel DeGrasse's avatar Daniel DeGrasse Committed by Christopher Friedt
Browse files

boards: mimxrt1010_evk: Add SPI support for RT1010



Adds SPI support on LPSPI1 to the RT1010. LPSPI1 is available on pins
6, 8, 10, and 12 of J57 on the evaluation board

Signed-off-by: default avatarDaniel DeGrasse <daniel.degrasse@nxp.com>
parent 97b138e8
Loading
Loading
Loading
Loading
+10 −0
Original line number Diff line number Diff line
@@ -67,6 +67,8 @@ features:
+-----------+------------+-------------------------------------+
| GPIO      | on-chip    | gpio                                |
+-----------+------------+-------------------------------------+
| SPI       | on-chip    | spi                                 |
+-----------+------------+-------------------------------------+
| I2C       | on-chip    | i2c                                 |
+-----------+------------+-------------------------------------+
| UART      | on-chip    | serial port-polling;                |
@@ -100,6 +102,14 @@ The MIMXRT1010 SoC has five pairs of pinmux/gpio controllers.
+---------------+-----------------+---------------------------+
| GPIO_02       | LPI2C1_CLK      | I2C SCL                   |
+---------------+-----------------+---------------------------+
| GPIO_AD_03    | LPSPI1_SDI      | SPI                       |
+---------------+-----------------+---------------------------+
| GPIO_AD_04    | LPSPI1_SDO      | SPI                       |
+---------------+-----------------+---------------------------+
| GPIO_AD_05    | LPSPI1_PCS0     | SPI                       |
+---------------+-----------------+---------------------------+
| GPIO_AD_06    | LPSPI1_SCK      | SPI                       |
+---------------+-----------------+---------------------------+

System Clock
============
+4 −0
Original line number Diff line number Diff line
@@ -65,6 +65,10 @@ arduino_serial: &lpuart1 {};
	current-speed = <115200>;
};

&lpspi1 {
	status = "okay";
};

zephyr_udc0: &usb1 {
	status = "okay";
};
+1 −0
Original line number Diff line number Diff line
@@ -19,3 +19,4 @@ supported:
  - i2c
  - counter
  - usb_device
  - spi
+25 −0
Original line number Diff line number Diff line
@@ -72,6 +72,31 @@ static int mimxrt1010_evk_init(const struct device *dev)
				IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif

#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpspi1), okay) && CONFIG_SPI
	/* LPSPI1 CS, SDO, SDI, CLK exposed as pins 6, 8, 10, and 12 on J57 */
	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_03_LPSPI1_SDI, 0U);
	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_04_LPSPI1_SDO, 0U);
	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_05_LPSPI1_PCS0, 0U);
	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_06_LPSPI1_SCK, 0U);

	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_03_LPSPI1_SDI,
			IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
			IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
			IOMUXC_SW_PAD_CTL_PAD_DSE(4));
	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_04_LPSPI1_SDO,
			IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
			IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
			IOMUXC_SW_PAD_CTL_PAD_DSE(4));
	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_05_LPSPI1_PCS0,
			IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
			IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
			IOMUXC_SW_PAD_CTL_PAD_DSE(4));
	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_06_LPSPI1_SCK,
			IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
			IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
			IOMUXC_SW_PAD_CTL_PAD_DSE(4));
#endif

	return 0;
}

+29 −0
Original line number Diff line number Diff line
@@ -85,5 +85,34 @@
		/* Remove GPIO3 & GPIO4, they dont exist on RT1010 */
		/delete-node/ gpio@401c0000;
		/delete-node/ gpio@401c4000;

		/* Fixup LPSPI1 and LPSPI2, they have different base addr on RT1010 */
		/delete-node/ spi@40394000;
		/delete-node/ spi@40398000;
		lpspi1: spi@40194000 {
			compatible = "nxp,imx-lpspi";
			reg = <0x40194000 0x4000>;
			interrupts = <32 3>;
			label = "SPI_1";
			status = "disabled";
			clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		lpspi2: spi@40198000 {
			compatible = "nxp,imx-lpspi";
			reg = <0x40198000 0x4000>;
			interrupts = <33 3>;
			label = "SPI_2";
			status = "disabled";
			clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 2>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};
};

/* RT1015 only has two LPSPI blocks */
/delete-node/ &lpspi3;
/delete-node/ &lpspi4;
Loading