Skip to content
Commit a8ae1dcd authored by Guillaume Gautier's avatar Guillaume Gautier Committed by Carles Cufí
Browse files

soc: st: stm32: n6: set vddio voltage 



Set VddIO 2 and 3 voltage to 1.8V

Signed-off-by: default avatarGuillaume Gautier <guillaume.gautier-ext@st.com>
parent 601a9fab
Show whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment

CRA Git | Maintained and supported by SUSTech CRA and CCSE