Commit a6fda002 authored by Anisetti Avinash Krishna's avatar Anisetti Avinash Krishna Committed by Fabio Baltieri
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drivers: spi: pw: Fix SPI Receive FIFO set 

Fixes SPI Receive FIFO register set operation.

Signed-off-by: default avatarAnisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
parent 6161fbdf

drivers/spi/spi_pw.c

+2 −2
Changes for drivers/spi/spi_pw.c: 2 added lines, 2 removed lines.
Original line number Diff line number Diff line
@@ -208,8 +208,8 @@ static void spi_pw_rx_thld_set(const struct device *dev, 


	/* Rx threshold */

	reg_data = spi_pw_reg_read(dev, PW_SPI_REG_SIRF);

	reg_data = (uint32_t) ~(PW_SPI_WM_MASK);

	reg_data = PW_SPI_SIRF_WM_DFLT;

	reg_data &= (uint32_t) ~(PW_SPI_WM_MASK);

	reg_data |= PW_SPI_SIRF_WM_DFLT;

	if (spi->ctx.rx_len && spi->ctx.rx_len < spi->fifo_depth) {

		reg_data = spi->ctx.rx_len - 1;

	}

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