drivers: rtc: rtc_ds1307: Fix corruption of SECONDS register (a2e920cf) · Commits · Wenxi XU / zephyr

We read/modify/write the CH/SECONDS register at initialisation to clear only the Clock Halt bit and only if it is set. The previous implementation zeroes the entire register unconditionally at initialisation, which wipes the SECONDS fields. Fixes #77354. Signed-off-by:

Andrew Feldhaus <github@feldhaus.co.uk>

drivers/rtc/rtc_ds1307.c

+14 −4

Original line number	Diff line number	Diff line
		@@ -139,10 +139,20 @@ static int ds1307_init(const struct device *dev)
		LOG_ERR("Error: SQW: %d\n", err);
		}

		/* Make clock halt = 0 */
		err = i2c_reg_write_byte_dt(&config->i2c_bus, DS1307_REG_SECONDS, 0x00);
		/* Ensure Clock Halt = 0 */
		uint8_t reg = 0;

		err = i2c_reg_read_byte_dt(&config->i2c_bus, DS1307_REG_SECONDS, &reg);
		if (err < 0) {
		LOG_ERR("Error: Read SECONDS/Clock Halt register: %d\n", err);
		}
		if (reg & ~SECONDS_BITS) {
		/* Clock Halt bit is set */
		err = i2c_reg_write_byte_dt(&config->i2c_bus, DS1307_REG_SECONDS,
		reg & SECONDS_BITS);
		if (err < 0) {
		LOG_ERR("Error: Set clock halt bit:%d\n", err);
		LOG_ERR("Error: Clear Clock Halt bit: %d\n", err);
		}
		}

		return 0;

Admin message